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			Markdown
		
	
	
	
	
	
		
		
			
		
	
	
			187 lines
		
	
	
		
			6.7 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
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								VIXL: Armv8 Runtime Code Generation Library, 3.0.0
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								==================================================
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								Contents:
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								 * Overview
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								 * Licence
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								 * Requirements
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								 * Known limitations
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								 * Usage
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								Overview
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								========
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								VIXL contains three components.
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								 1. Programmatic **assemblers** to generate A64, A32 or T32 code at runtime. The
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								    assemblers abstract some of the constraints of each ISA; for example, most
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								    instructions support any immediate.
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								 2. **Disassemblers** that can print any instruction emitted by the assemblers.
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								 3. A **simulator** that can simulate any instruction emitted by the A64
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								    assembler. The simulator allows generated code to be run on another
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								    architecture without the need for a full ISA model.
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								The VIXL git repository can be found [on 'https://git.linaro.org'][vixl].
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								Changes from previous versions of VIXL can be found in the
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								[Changelog](doc/changelog.md).
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								Licence
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								=======
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								This software is covered by the licence described in the [LICENCE](LICENCE)
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								file.
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								Requirements
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								============
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								To build VIXL the following software is required:
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								 1. Python 2.7
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								 2. SCons 2.0
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								 3. GCC 4.8+ or Clang 3.4+
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								A 64-bit host machine is required, implementing an LP64 data model. VIXL has
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								been tested using GCC on AArch64 Debian, GCC and Clang on amd64 Ubuntu
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								systems.
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								To run the linter and code formatting stages of the tests, the following
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								software is also required:
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								 1. Git
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								 2. [Google's `cpplint.py`][cpplint]
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								 3. clang-format-3.8
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								Refer to the 'Usage' section for details.
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								Known Limitations for AArch64 code generation
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								=============================================
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								VIXL was developed for JavaScript engines so a number of features from A64 were
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								deemed unnecessary:
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								 * Limited rounding mode support for floating point.
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								 * Limited support for synchronisation instructions.
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								 * Limited support for system instructions.
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								 * A few miscellaneous integer and floating point instructions are missing.
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								The VIXL simulator supports only those instructions that the VIXL assembler can
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								generate. The `doc` directory contains a
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								[list of supported A64 instructions](doc/aarch64/supported-instructions-aarch64.md).
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								The VIXL simulator was developed to run on 64-bit amd64 platforms. Whilst it
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								builds and mostly works for 32-bit x86 platforms, there are a number of
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								floating-point operations which do not work correctly, and a number of tests
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								fail as a result.
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								VIXL may not build using Clang 3.7, due to a compiler warning. A workaround is
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								to disable conversion of warnings to errors, or to delete the offending
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								`return` statement reported and rebuild. This problem will be fixed in the next
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								release.
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								Debug Builds
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								------------
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								Your project's build system must define `VIXL_DEBUG` (eg. `-DVIXL_DEBUG`)
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								when using a VIXL library that has been built with debug enabled.
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								Some classes defined in VIXL header files contain fields that are only present
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								in debug builds, so if `VIXL_DEBUG` is defined when the library is built, but
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								not defined for the header files included in your project, you will see runtime
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								failures.
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								Exclusive-Access Instructions
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								-----------------------------
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								All exclusive-access instructions are supported, but the simulator cannot
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								accurately simulate their behaviour as described in the ARMv8 Architecture
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								Reference Manual.
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								 * A local monitor is simulated, so simulated exclusive loads and stores execute
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								   as expected in a single-threaded environment.
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								 * The global monitor is simulated by occasionally causing exclusive-access
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								   instructions to fail regardless of the local monitor state.
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								 * Load-acquire, store-release semantics are approximated by issuing a host
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								   memory barrier after loads or before stores. The built-in
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								   `__sync_synchronize()` is used for this purpose.
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								The simulator tries to be strict, and implements the following restrictions that
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								the ARMv8 ARM allows:
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								 * A pair of load-/store-exclusive instructions will only succeed if they have
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								   the same address and access size.
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								 * Most of the time, cache-maintenance operations or explicit memory accesses
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								   will clear the exclusive monitor.
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								    * To ensure that simulated code does not depend on this behaviour, the
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								      exclusive monitor will sometimes be left intact after these instructions.
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								Instructions affected by these limitations:
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								  `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
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								  `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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								  `stlrh`, `stlr`, `ldarb`, `ldarh`, `ldar`, `clrex`.
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								Usage
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								=====
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								Running all Tests
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								-----------------
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								The helper script `tools/test.py` will build and run every test that is provided
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								with VIXL, in both release and debug mode. It is a useful script for verifying
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								that all of VIXL's dependencies are in place and that VIXL is working as it
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								should.
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								By default, the `tools/test.py` script runs a linter to check that the source
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								code conforms with the code style guide, and to detect several common errors
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								that the compiler may not warn about. This is most useful for VIXL developers.
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								The linter has the following dependencies:
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								 1. Git must be installed, and the VIXL project must be in a valid Git
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								    repository, such as one produced using `git clone`.
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								 2. `cpplint.py`, [as provided by Google][cpplint], must be available (and
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								    executable) on the `PATH`.
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								It is possible to tell `tools/test.py` to skip the linter stage by passing
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								`--nolint`. This removes the dependency on `cpplint.py` and Git. The `--nolint`
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								option is implied if the VIXL project is a snapshot (with no `.git` directory).
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								Additionally, `tools/test.py` tests code formatting using `clang-format-3.8`.
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								If you don't have `clang-format-3.8`, disable the test using the
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								`--noclang-format` option.
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								Also note that the tests for the tracing features depend upon external `diff`
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								and `sed` tools. If these tools are not available in `PATH`, these tests will
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								fail.
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								Getting Started
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								---------------
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								We have separate guides for introducing VIXL, depending on what architecture you
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								are targeting. A guide for working with AArch32 can be found
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								[here][getting-started-aarch32], while the AArch64 guide is
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								[here][getting-started-aarch64]. Example source code is provided in the
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								[examples](examples) directory. You can build examples with either `scons
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								aarch32_examples` or `scons aarch64_examples` from the root directory, or use
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								`scons --help` to get a detailed list of available build targets.
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								[cpplint]: http://google-styleguide.googlecode.com/svn/trunk/cpplint/cpplint.py
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								           "Google's cpplint.py script."
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								[vixl]: https://git.linaro.org/arm/vixl.git
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								        "The VIXL repository at 'https://git.linaro.org'."
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								[getting-started-aarch32]: doc/aarch32/getting-started-aarch32.md
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								                           "Introduction to VIXL for AArch32."
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								[getting-started-aarch64]: doc/aarch64/getting-started-aarch64.md
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								                           "Introduction to VIXL for AArch64."
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