2019-09-20 13:40:19 +00:00
|
|
|
#pragma once
|
|
|
|
#include "common/bitfield.h"
|
|
|
|
#include "types.h"
|
|
|
|
#include <array>
|
2020-01-24 04:53:40 +00:00
|
|
|
#include <memory>
|
2019-09-20 13:40:19 +00:00
|
|
|
|
|
|
|
class StateWrapper;
|
|
|
|
|
2020-01-24 04:53:40 +00:00
|
|
|
class TimingEvent;
|
|
|
|
class GPU;
|
2019-09-20 13:40:19 +00:00
|
|
|
|
2020-07-31 07:09:18 +00:00
|
|
|
class Timers final
|
2019-09-20 13:40:19 +00:00
|
|
|
{
|
|
|
|
public:
|
|
|
|
Timers();
|
|
|
|
~Timers();
|
|
|
|
|
2020-07-31 07:09:18 +00:00
|
|
|
void Initialize();
|
|
|
|
void Shutdown();
|
2019-09-20 13:40:19 +00:00
|
|
|
void Reset();
|
|
|
|
bool DoState(StateWrapper& sw);
|
|
|
|
|
|
|
|
void SetGate(u32 timer, bool state);
|
|
|
|
|
2019-10-26 02:55:56 +00:00
|
|
|
void DrawDebugStateWindow();
|
2019-10-12 12:15:38 +00:00
|
|
|
|
2020-09-29 13:29:28 +00:00
|
|
|
void CPUClocksChanged();
|
|
|
|
|
2019-09-20 13:40:19 +00:00
|
|
|
// dot clock/hblank/sysclk div 8
|
2020-07-31 07:09:18 +00:00
|
|
|
ALWAYS_INLINE bool IsUsingExternalClock(u32 timer) const { return m_states[timer].external_counting_enabled; }
|
2020-04-28 10:30:44 +00:00
|
|
|
|
|
|
|
// queries for GPU
|
2020-07-31 07:09:18 +00:00
|
|
|
ALWAYS_INLINE bool IsExternalIRQEnabled(u32 timer) const
|
2020-04-28 10:30:44 +00:00
|
|
|
{
|
|
|
|
const CounterState& cs = m_states[timer];
|
|
|
|
return (cs.external_counting_enabled && (cs.mode.bits & ((1u << 4) | (1u << 5))) != 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
TickCount GetTicksUntilIRQ(u32 timer) const;
|
|
|
|
|
2019-10-08 08:21:15 +00:00
|
|
|
void AddTicks(u32 timer, TickCount ticks);
|
2019-09-20 13:40:19 +00:00
|
|
|
|
|
|
|
u32 ReadRegister(u32 offset);
|
|
|
|
void WriteRegister(u32 offset, u32 value);
|
|
|
|
|
|
|
|
private:
|
|
|
|
static constexpr u32 NUM_TIMERS = 3;
|
|
|
|
|
|
|
|
enum class SyncMode : u8
|
|
|
|
{
|
|
|
|
PauseOnGate = 0,
|
|
|
|
ResetOnGate = 1,
|
|
|
|
ResetAndRunOnGate = 2,
|
|
|
|
FreeRunOnGate = 3
|
|
|
|
};
|
|
|
|
|
|
|
|
union CounterMode
|
|
|
|
{
|
|
|
|
u32 bits;
|
|
|
|
|
|
|
|
BitField<u32, bool, 0, 1> sync_enable;
|
|
|
|
BitField<u32, SyncMode, 1, 2> sync_mode;
|
|
|
|
BitField<u32, bool, 3, 1> reset_at_target;
|
|
|
|
BitField<u32, bool, 4, 1> irq_at_target;
|
|
|
|
BitField<u32, bool, 5, 1> irq_on_overflow;
|
|
|
|
BitField<u32, bool, 6, 1> irq_repeat;
|
2019-10-08 08:21:15 +00:00
|
|
|
BitField<u32, bool, 7, 1> irq_pulse_n;
|
2019-09-20 13:40:19 +00:00
|
|
|
BitField<u32, u8, 8, 2> clock_source;
|
2019-10-08 08:21:15 +00:00
|
|
|
BitField<u32, bool, 10, 1> interrupt_request_n;
|
2019-09-20 13:40:19 +00:00
|
|
|
BitField<u32, bool, 11, 1> reached_target;
|
|
|
|
BitField<u32, bool, 12, 1> reached_overflow;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct CounterState
|
|
|
|
{
|
|
|
|
CounterMode mode;
|
|
|
|
u32 counter;
|
|
|
|
u32 target;
|
|
|
|
bool gate;
|
|
|
|
bool use_external_clock;
|
|
|
|
bool external_counting_enabled;
|
|
|
|
bool counting_enabled;
|
2019-10-08 08:21:15 +00:00
|
|
|
bool irq_done;
|
2019-09-20 13:40:19 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
void UpdateCountingEnabled(CounterState& cs);
|
2019-10-08 08:21:15 +00:00
|
|
|
void UpdateIRQ(u32 index);
|
2019-09-20 13:40:19 +00:00
|
|
|
|
2020-01-24 04:53:40 +00:00
|
|
|
void AddSysClkTicks(TickCount sysclk_ticks);
|
|
|
|
|
|
|
|
TickCount GetTicksUntilNextInterrupt() const;
|
|
|
|
void UpdateSysClkEvent();
|
2019-09-20 13:40:19 +00:00
|
|
|
|
2020-01-24 06:44:13 +00:00
|
|
|
std::unique_ptr<TimingEvent> m_sysclk_event;
|
2019-09-20 13:40:19 +00:00
|
|
|
|
|
|
|
std::array<CounterState, NUM_TIMERS> m_states{};
|
2020-09-29 13:29:28 +00:00
|
|
|
TickCount m_syclk_ticks_carry = 0; // 0 unless overclocking is enabled
|
|
|
|
u32 m_sysclk_div_8_carry = 0; // partial ticks for timer 3 with sysclk/8
|
2019-09-20 13:40:19 +00:00
|
|
|
};
|
2020-07-31 07:09:18 +00:00
|
|
|
|
|
|
|
extern Timers g_timers;
|