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PGXP: Combine instr and rtVal parameters for CPU_LUI
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@ -939,7 +939,7 @@ restart_instruction:
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WriteReg(inst.i.rt, value);
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if constexpr (pgxp_mode >= PGXPMode::CPU)
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PGXP::CPU_LUI(inst.bits, value);
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PGXP::CPU_LUI(inst.bits);
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}
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break;
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@ -2274,16 +2274,11 @@ bool CodeGenerator::Compile_lui(const CodeBlockInstruction& cbi)
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{
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InstructionPrologue(cbi, 1);
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if (g_settings.UsingPGXPCPUMode())
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EmitFunctionCall(nullptr, &PGXP::CPU_LUI, Value::FromConstantU32(cbi.instruction.bits));
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// rt <- (imm << 16)
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const u32 value = cbi.instruction.i.imm_zext32() << 16;
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if (g_settings.UsingPGXPCPUMode())
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{
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// TODO: rtVal can be skipped here, and probably worthwhile given this is a common instruction.
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EmitFunctionCall(nullptr, &PGXP::CPU_LUI, Value::FromConstantU32(cbi.instruction.bits),
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Value::FromConstantU32(value));
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}
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m_register_cache.WriteGuestRegister(cbi.instruction.i.rt, Value::FromConstantU32(value));
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SpeculativeWriteReg(cbi.instruction.i.rt, value);
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@ -1045,13 +1045,13 @@ void CPU_SLTIU(u32 instr, u32 rtVal, u32 rsVal)
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////////////////////////////////////
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// Load Upper
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////////////////////////////////////
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void CPU_LUI(u32 instr, u32 rtVal)
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void CPU_LUI(u32 instr)
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{
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// Rt = Imm << 16
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CPU_reg[rt(instr)] = PGXP_value_zero;
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CPU_reg[rt(instr)].y = (float)(s16)imm(instr);
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CPU_reg[rt(instr)].hFlags = VALID_HALF;
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CPU_reg[rt(instr)].value = rtVal;
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CPU_reg[rt(instr)].value = static_cast<u32>(imm(instr)) << 16;
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CPU_reg[rt(instr)].flags = VALID_01;
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}
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@ -63,7 +63,7 @@ void CPU_SLTI(u32 instr, u32 rtVal, u32 rsVal);
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void CPU_SLTIU(u32 instr, u32 rtVal, u32 rsVal);
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// Load Upper
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void CPU_LUI(u32 instr, u32 rtVal);
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void CPU_LUI(u32 instr);
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// Register Arithmetic
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void CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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