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Bus: Fix RAM mirrors with LUT fastmem
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parent
31052581d3
commit
2171fd9a6f
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@ -138,6 +138,7 @@ static std::tuple<TickCount, TickCount, TickCount> CalculateMemoryTiming(MEMDELA
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static void RecalculateMemoryTimings();
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static void RecalculateMemoryTimings();
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static void SetCodePageFastmemProtection(u32 page_index, bool writable);
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static void SetCodePageFastmemProtection(u32 page_index, bool writable);
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static void SetLUTFastmemProtection(u32 page_index, bool writable);
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} // namespace Bus
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} // namespace Bus
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#define FIXUP_HALFWORD_OFFSET(size, offset) ((size >= MemoryAccessSize::HalfWord) ? (offset) : ((offset) & ~1u))
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#define FIXUP_HALFWORD_OFFSET(size, offset) ((size >= MemoryAccessSize::HalfWord) ? (offset) : ((offset) & ~1u))
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@ -460,12 +461,13 @@ void Bus::UpdateFastmemViews(CPUFastmemMode mode)
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std::memset(s_fastmem_lut, 0, sizeof(u8*) * FASTMEM_LUT_NUM_SLOTS);
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std::memset(s_fastmem_lut, 0, sizeof(u8*) * FASTMEM_LUT_NUM_SLOTS);
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auto MapRAM = [](u32 base_address) {
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auto MapRAM = [](u32 base_address) {
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u8* ram_ptr = g_ram;
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u8* ram_ptr = g_ram + (base_address & g_ram_mask);
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for (u32 address = 0; address < g_ram_size; address += FASTMEM_LUT_PAGE_SIZE)
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for (u32 address = 0; address < g_ram_size; address += FASTMEM_LUT_PAGE_SIZE)
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{
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{
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const u32 lut_index = (base_address + address) >> FASTMEM_LUT_PAGE_SHIFT;
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const u32 lut_index = (base_address + address) >> FASTMEM_LUT_PAGE_SHIFT;
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s_fastmem_lut[lut_index] = ram_ptr;
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s_fastmem_lut[lut_index] = ram_ptr;
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s_fastmem_lut[FASTMEM_LUT_NUM_PAGES + lut_index] = g_ram_code_bits[address >> HOST_PAGE_SHIFT] ? nullptr : ram_ptr;
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s_fastmem_lut[FASTMEM_LUT_NUM_PAGES + lut_index] =
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g_ram_code_bits[address >> HOST_PAGE_SHIFT] ? nullptr : ram_ptr;
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ram_ptr += FASTMEM_LUT_PAGE_SIZE;
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ram_ptr += FASTMEM_LUT_PAGE_SIZE;
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}
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}
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};
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};
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@ -564,16 +566,16 @@ void Bus::SetCodePageFastmemProtection(u32 page_index, bool writable)
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{
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{
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// mirrors...
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// mirrors...
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const u32 code_addr = page_index << HOST_PAGE_SHIFT;
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const u32 code_addr = page_index << HOST_PAGE_SHIFT;
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u8* code_ptr = &g_ram[code_addr];
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for (u32 mirror_start : s_fastmem_ram_mirrors)
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for (u32 mirror_start : s_fastmem_ram_mirrors)
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{
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{
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u32 ram_offset = code_addr;
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u32 lut_addr = mirror_start + code_addr;
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u8* ram_ptr = code_ptr;
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u32 ram_offset = (lut_addr & g_ram_mask);
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for (u32 i = 0; i < FASTMEM_LUT_PAGES_PER_CODE_PAGE; i++)
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for (u32 j = 0; j < FASTMEM_LUT_PAGES_PER_CODE_PAGE; j++)
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{
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{
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s_fastmem_lut[FASTMEM_LUT_NUM_PAGES + ((mirror_start + ram_offset) >> FASTMEM_LUT_PAGE_SHIFT)] = ram_ptr;
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s_fastmem_lut[FASTMEM_LUT_NUM_PAGES + (lut_addr >> FASTMEM_LUT_PAGE_SHIFT)] =
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writable ? &g_ram[ram_offset] : nullptr;
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lut_addr += FASTMEM_LUT_PAGE_SIZE;
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ram_offset += FASTMEM_LUT_PAGE_SIZE;
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ram_offset += FASTMEM_LUT_PAGE_SIZE;
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ram_ptr += FASTMEM_LUT_PAGE_SIZE;
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}
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}
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}
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}
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}
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}
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@ -601,19 +603,16 @@ void Bus::ClearRAMCodePageFlags()
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{
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{
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for (u32 i = 0; i < static_cast<u32>(g_ram_code_bits.size()); i++)
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for (u32 i = 0; i < static_cast<u32>(g_ram_code_bits.size()); i++)
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{
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{
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const u32 code_addr = (i * HOST_PAGE_SIZE);
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u32 lut_addr = (i * HOST_PAGE_SIZE);
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for (u32 mirror_start : s_fastmem_ram_mirrors)
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u32 ram_offset = (lut_addr & g_ram_mask);
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{
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u32 ram_offset = code_addr;
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for (u32 j = 0; j < FASTMEM_LUT_PAGES_PER_CODE_PAGE; j++)
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for (u32 j = 0; j < FASTMEM_LUT_PAGES_PER_CODE_PAGE; j++)
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{
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{
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s_fastmem_lut[FASTMEM_LUT_NUM_PAGES + ((mirror_start + ram_offset) >> FASTMEM_LUT_PAGE_SHIFT)] =
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s_fastmem_lut[FASTMEM_LUT_NUM_PAGES + (lut_addr >> FASTMEM_LUT_PAGE_SHIFT)] = &g_ram[ram_offset];
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&g_ram[ram_offset];
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lut_addr += FASTMEM_LUT_PAGE_SIZE;
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ram_offset += FASTMEM_LUT_PAGE_SIZE;
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ram_offset += FASTMEM_LUT_PAGE_SIZE;
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}
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}
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}
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}
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}
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}
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}
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}
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}
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bool Bus::IsCodePageAddress(PhysicalMemoryAddress address)
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bool Bus::IsCodePageAddress(PhysicalMemoryAddress address)
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