mirror of
https://github.com/RetroDECK/Duckstation.git
synced 2024-11-26 15:45:42 +00:00
CDROM: Reads appear to be functioning
This commit is contained in:
parent
c988af453c
commit
2875a22987
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@ -9,6 +9,16 @@ public:
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CDImage();
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CDImage();
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~CDImage();
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~CDImage();
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enum : u32
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{
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RAW_SECTOR_SIZE = 2352,
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DATA_SECTOR_SIZE = 2048,
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SECTOR_SYNC_SIZE = 12,
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FRAMES_PER_SECOND = 75, // "sectors"
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SECONDS_PER_MINUTE = 60,
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FRAMES_PER_MINUTE = FRAMES_PER_SECOND * SECONDS_PER_MINUTE,
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};
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enum class ReadMode : u32
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enum class ReadMode : u32
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{
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{
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DataOnly, // 2048 bytes per sector.
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DataOnly, // 2048 bytes per sector.
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@ -40,16 +50,6 @@ public:
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u32 Read(ReadMode read_mode, u32 sector_count, void* buffer);
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u32 Read(ReadMode read_mode, u32 sector_count, void* buffer);
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private:
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private:
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enum : u32
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{
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RAW_SECTOR_SIZE = 2352,
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DATA_SECTOR_SIZE = 2048,
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SECTOR_SYNC_SIZE = 12,
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FRAMES_PER_SECOND = 75, // "sectors"
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SECONDS_PER_MINUTE = 60,
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FRAMES_PER_MINUTE = FRAMES_PER_SECOND * SECONDS_PER_MINUTE,
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};
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// TODO: Multiple data files from cue sheet
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// TODO: Multiple data files from cue sheet
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ByteStream* m_data_file = nullptr;
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ByteStream* m_data_file = nullptr;
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@ -16,8 +16,8 @@ class FIFOQueue
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public:
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public:
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const T* GetDataPointer() const { return m_ptr; }
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const T* GetDataPointer() const { return m_ptr; }
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T* GetDataPointer() { return m_ptr; }
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T* GetDataPointer() { return m_ptr; }
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const T* GetFrontPointer() const { return m_ptr[m_head]; }
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const T* GetFrontPointer() const { return &m_ptr[m_head]; }
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T* GetFrontPointer() { return m_ptr[m_head]; }
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T* GetFrontPointer() { return &m_ptr[m_head]; }
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constexpr u32 GetCapacity() const { return CAPACITY; }
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constexpr u32 GetCapacity() const { return CAPACITY; }
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u32 GetSize() const { return m_size; }
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u32 GetSize() const { return m_size; }
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bool IsEmpty() const { return m_size == 0; }
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bool IsEmpty() const { return m_size == 0; }
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@ -91,6 +91,17 @@ public:
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const T& Peek() const { return m_ptr[m_head]; }
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const T& Peek() const { return m_ptr[m_head]; }
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const T& Peek(u32 offset) { return m_ptr[(m_head + offset) % CAPACITY]; }
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const T& Peek(u32 offset) { return m_ptr[(m_head + offset) % CAPACITY]; }
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void Remove(u32 count)
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{
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Assert(m_size >= count);
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for (u32 i = 0; i < count; i++)
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{
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m_ptr[m_head].~T();
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m_head = (m_head + 1) % CAPACITY;
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m_size--;
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}
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}
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void RemoveOne()
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void RemoveOne()
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{
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{
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Assert(m_size > 0);
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Assert(m_size > 0);
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@ -80,7 +80,7 @@ int main(int argc, char* argv[])
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{
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{
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// set log flags
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// set log flags
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// g_pLog->SetConsoleOutputParams(true, nullptr, LOGLEVEL_DEBUG);
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// g_pLog->SetConsoleOutputParams(true, nullptr, LOGLEVEL_DEBUG);
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g_pLog->SetConsoleOutputParams(true, "GPU GPU_HW_OpenGL DMA", LOGLEVEL_DEBUG);
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g_pLog->SetConsoleOutputParams(true, "GPU GPU_HW_OpenGL Pad DigitalController", LOGLEVEL_DEBUG);
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#ifdef Y_BUILD_CONFIG_RELEASE
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#ifdef Y_BUILD_CONFIG_RELEASE
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g_pLog->SetFilterLevel(LOGLEVEL_INFO);
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g_pLog->SetFilterLevel(LOGLEVEL_INFO);
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@ -3,14 +3,16 @@
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#include "common/cd_image.h"
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#include "common/cd_image.h"
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#include "common/state_wrapper.h"
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#include "common/state_wrapper.h"
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#include "interrupt_controller.h"
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#include "interrupt_controller.h"
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#include "system.h"
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Log_SetChannel(CDROM);
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Log_SetChannel(CDROM);
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CDROM::CDROM() = default;
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CDROM::CDROM() = default;
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CDROM::~CDROM() = default;
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CDROM::~CDROM() = default;
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bool CDROM::Initialize(DMA* dma, InterruptController* interrupt_controller)
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bool CDROM::Initialize(System* system, DMA* dma, InterruptController* interrupt_controller)
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{
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{
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m_system = system;
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m_dma = dma;
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m_dma = dma;
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m_interrupt_controller = interrupt_controller;
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m_interrupt_controller = interrupt_controller;
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return true;
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return true;
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@ -18,7 +20,7 @@ bool CDROM::Initialize(DMA* dma, InterruptController* interrupt_controller)
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void CDROM::Reset()
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void CDROM::Reset()
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{
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{
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m_state = State::Idle;
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m_command_state = CommandState::Idle;
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m_status.bits = 0;
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m_status.bits = 0;
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m_secondary_status.bits = 0;
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m_secondary_status.bits = 0;
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m_interrupt_enable_register = INTERRUPT_REGISTER_MASK;
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m_interrupt_enable_register = INTERRUPT_REGISTER_MASK;
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@ -27,13 +29,11 @@ void CDROM::Reset()
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m_response_fifo.Clear();
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m_response_fifo.Clear();
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m_data_fifo.Clear();
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m_data_fifo.Clear();
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UpdateStatusRegister();
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UpdateStatusRegister();
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m_secondary_status.shell_open = true;
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}
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}
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bool CDROM::DoState(StateWrapper& sw)
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bool CDROM::DoState(StateWrapper& sw)
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{
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{
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sw.Do(&m_state);
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sw.Do(&m_command_state);
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sw.Do(&m_status.bits);
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sw.Do(&m_status.bits);
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sw.Do(&m_secondary_status.bits);
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sw.Do(&m_secondary_status.bits);
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sw.Do(&m_interrupt_enable_register);
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sw.Do(&m_interrupt_enable_register);
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@ -57,7 +57,7 @@ bool CDROM::InsertMedia(const char* filename)
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RemoveMedia();
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RemoveMedia();
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m_media = std::move(media);
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m_media = std::move(media);
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m_secondary_status.shell_open = false;
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// m_secondary_status.shell_open = false;
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return true;
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return true;
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}
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}
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@ -69,7 +69,7 @@ void CDROM::RemoveMedia()
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// TODO: Error while reading?
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// TODO: Error while reading?
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Log_InfoPrintf("Removing CD...");
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Log_InfoPrintf("Removing CD...");
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m_media.reset();
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m_media.reset();
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m_secondary_status.shell_open = true;
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// m_secondary_status.shell_open = true;
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}
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}
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u8 CDROM::ReadRegister(u32 offset)
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u8 CDROM::ReadRegister(u32 offset)
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@ -77,12 +77,14 @@ u8 CDROM::ReadRegister(u32 offset)
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switch (offset)
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switch (offset)
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{
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{
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case 0: // status register
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case 0: // status register
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Log_DebugPrintf("CDROM read status register <- 0x%08X", m_status.bits);
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return m_status.bits;
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return m_status.bits;
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case 1: // always response FIFO
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case 1: // always response FIFO
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{
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{
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const u8 value = m_response_fifo.Pop();
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const u8 value = m_response_fifo.Pop();
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UpdateStatusRegister();
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UpdateStatusRegister();
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Log_DebugPrintf("CDROM read response FIFO <- 0x%08X", ZeroExtend32(value));
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return value;
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return value;
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}
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}
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@ -90,6 +92,7 @@ u8 CDROM::ReadRegister(u32 offset)
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{
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{
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const u8 value = m_data_fifo.Pop();
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const u8 value = m_data_fifo.Pop();
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UpdateStatusRegister();
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UpdateStatusRegister();
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Log_DebugPrintf("CDROM read data FIFO <- 0x%08X", ZeroExtend32(value));
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return value;
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return value;
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}
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}
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@ -99,10 +102,13 @@ u8 CDROM::ReadRegister(u32 offset)
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{
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{
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case 0:
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case 0:
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case 2:
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case 2:
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Log_DebugPrintf("CDROM read interrupt enable register <- 0x%02X",
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ZeroExtend32(m_interrupt_enable_register | ~INTERRUPT_REGISTER_MASK));
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return m_interrupt_enable_register | ~INTERRUPT_REGISTER_MASK;
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return m_interrupt_enable_register | ~INTERRUPT_REGISTER_MASK;
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case 1:
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case 1:
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case 3:
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case 3:
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Log_DebugPrintf("CDROM read interrupt flag register <- 0x%02X", ZeroExtend32(m_interrupt_flag_register));
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return m_interrupt_flag_register;
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return m_interrupt_flag_register;
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}
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}
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}
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}
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@ -134,10 +140,10 @@ void CDROM::WriteRegister(u32 offset, u8 value)
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case 0:
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case 0:
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{
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{
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Log_DebugPrintf("CDROM command register <- 0x%02X", ZeroExtend32(value));
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Log_DebugPrintf("CDROM command register <- 0x%02X", ZeroExtend32(value));
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if (m_state != State::Idle)
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if (m_command_state == CommandState::Idle)
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Log_ErrorPrintf("Ignoring write (0x%02X) to command register in non-idle state", ZeroExtend32(value));
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BeginCommand(static_cast<Command>(value));
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else
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else
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ExecuteCommand(static_cast<Command>(value));
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Log_ErrorPrintf("Ignoring write (0x%02X) to command register in non-idle state", ZeroExtend32(value));
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return;
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return;
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}
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}
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@ -208,7 +214,11 @@ void CDROM::WriteRegister(u32 offset, u8 value)
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{
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{
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case 0:
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case 0:
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{
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{
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Log_ErrorPrintf("Request register <- 0x%02X", value);
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Log_DebugPrintf("Request register <- 0x%02X", value);
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const RequestRegister rr{value};
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// if (!rr.BFRD)
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// m_data_fifo.Clear();
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return;
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return;
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}
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}
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@ -216,7 +226,13 @@ void CDROM::WriteRegister(u32 offset, u8 value)
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{
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{
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Log_DebugPrintf("Interrupt flag register <- 0x%02X", value);
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Log_DebugPrintf("Interrupt flag register <- 0x%02X", value);
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m_interrupt_flag_register &= ~(value & INTERRUPT_REGISTER_MASK);
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m_interrupt_flag_register &= ~(value & INTERRUPT_REGISTER_MASK);
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Execute();
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if (m_interrupt_flag_register == 0 && m_command_state == CommandState::WaitForIRQClear)
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{
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m_system->Synchronize();
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m_command_state = CommandState::WaitForExecute;
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m_system->SetDowncount(m_command_remaining_ticks);
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}
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return;
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return;
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}
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}
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@ -240,6 +256,32 @@ void CDROM::WriteRegister(u32 offset, u8 value)
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ZeroExtend32(m_status.index.GetValue()), ZeroExtend32(value));
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ZeroExtend32(m_status.index.GetValue()), ZeroExtend32(value));
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}
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}
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u32 CDROM::DMARead()
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{
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if (m_data_fifo.IsEmpty())
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{
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Log_ErrorPrintf("DMA read on empty data FIFO");
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return UINT32_C(0xFFFFFFFF);
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}
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u32 data;
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if (m_data_fifo.GetSize() >= sizeof(data))
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{
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std::memcpy(&data, m_data_fifo.GetFrontPointer(), sizeof(data));
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m_data_fifo.Remove(sizeof(data));
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}
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else
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{
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Log_WarningPrintf("Unaligned DMA read on FIFO(%u)", m_data_fifo.GetSize());
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data = 0;
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std::memcpy(&data, m_data_fifo.GetFrontPointer(), m_data_fifo.GetSize());
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m_data_fifo.Clear();
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}
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Log_DebugPrintf("DMA Read -> 0x%08X", data);
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return data;
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}
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void CDROM::SetInterrupt(Interrupt interrupt)
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void CDROM::SetInterrupt(Interrupt interrupt)
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{
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{
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m_interrupt_flag_register = static_cast<u8>(interrupt);
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m_interrupt_flag_register = static_cast<u8>(interrupt);
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@ -251,19 +293,90 @@ void CDROM::UpdateStatusRegister()
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{
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{
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m_status.ADPBUSY = false;
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m_status.ADPBUSY = false;
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m_status.PRMEMPTY = m_param_fifo.IsEmpty();
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m_status.PRMEMPTY = m_param_fifo.IsEmpty();
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m_status.PRMWRDY = m_param_fifo.IsFull();
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m_status.PRMWRDY = !m_param_fifo.IsFull();
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m_status.RSLRRDY = !m_response_fifo.IsEmpty();
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m_status.RSLRRDY = !m_response_fifo.IsEmpty();
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m_status.DRQSTS = !m_data_fifo.IsEmpty();
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m_status.DRQSTS = !m_data_fifo.IsEmpty();
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m_status.BUSYSTS = m_state != State::Idle;
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m_status.BUSYSTS = m_command_state != CommandState::Idle;
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}
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}
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void CDROM::Execute() {}
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u32 CDROM::GetTicksForCommand() const
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void CDROM::ExecuteCommand(Command command)
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{
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{
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Log_ErrorPrintf("CDROM write command 0x%02X", ZeroExtend32(static_cast<u8>(command)));
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return 100;
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}
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switch (command)
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void CDROM::Execute(TickCount ticks)
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{
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switch (m_command_state)
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{
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case CommandState::Idle:
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case CommandState::WaitForIRQClear:
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break;
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case CommandState::WaitForExecute:
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{
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m_command_remaining_ticks -= ticks;
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if (m_command_remaining_ticks <= 0)
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ExecuteCommand();
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}
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break;
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default:
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UnreachableCode();
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break;
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}
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if (m_reading)
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{
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m_sector_read_remaining_ticks -= ticks;
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if (m_sector_read_remaining_ticks <= 0)
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DoSectorRead();
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}
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}
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void CDROM::BeginCommand(Command command)
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{
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m_response_fifo.Clear();
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m_system->Synchronize();
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m_command = command;
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m_command_stage = 0;
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m_command_remaining_ticks = GetTicksForCommand();
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m_command_state = CommandState::WaitForExecute;
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m_system->SetDowncount(m_command_remaining_ticks);
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UpdateStatusRegister();
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}
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void CDROM::NextCommandStage(bool wait_for_irq, u32 time)
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{
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// prevent re-execution when synchronizing below
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m_command_state = CommandState::WaitForIRQClear;
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m_command_remaining_ticks = time;
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m_command_stage++;
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if (wait_for_irq)
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return;
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m_system->Synchronize();
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m_command_state = CommandState::WaitForExecute;
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m_system->SetDowncount(m_command_remaining_ticks);
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UpdateStatusRegister();
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}
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void CDROM::EndCommand()
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{
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m_param_fifo.Clear();
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m_command_state = CommandState::Idle;
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m_command = Command::Sync;
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m_command_stage = 0;
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m_command_remaining_ticks = 0;
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UpdateStatusRegister();
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}
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void CDROM::ExecuteCommand()
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{
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Log_DevPrintf("CDROM executing command 0x%02X stage %u", ZeroExtend32(static_cast<u8>(m_command)), m_command_stage);
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switch (m_command)
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{
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{
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case Command::Getstat:
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case Command::Getstat:
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{
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{
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||||||
|
@ -272,16 +385,137 @@ void CDROM::ExecuteCommand(Command command)
|
||||||
// if bit 0 or 2 is set, send an additional byte
|
// if bit 0 or 2 is set, send an additional byte
|
||||||
m_response_fifo.Push(m_secondary_status.bits);
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
SetInterrupt(Interrupt::INT3);
|
SetInterrupt(Interrupt::INT3);
|
||||||
UpdateStatusRegister();
|
EndCommand();
|
||||||
|
return;
|
||||||
}
|
}
|
||||||
break;
|
|
||||||
|
|
||||||
case Command::Test:
|
case Command::Test:
|
||||||
{
|
{
|
||||||
const u8 subcommand = m_param_fifo.Pop();
|
const u8 subcommand = m_param_fifo.Pop();
|
||||||
ExecuteTestCommand(subcommand);
|
ExecuteTestCommand(subcommand);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
case Command::GetID:
|
||||||
|
{
|
||||||
|
Log_DebugPrintf("CDROM GetID command - stage %u", m_command_stage);
|
||||||
|
if (m_command_stage == 0)
|
||||||
|
{
|
||||||
|
if (!HasMedia())
|
||||||
|
{
|
||||||
|
static constexpr u8 response[] = {0x11, 0x80};
|
||||||
|
m_response_fifo.PushRange(response, countof(response));
|
||||||
|
SetInterrupt(Interrupt::INT5);
|
||||||
|
EndCommand();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
// INT3(stat), ...
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT3);
|
||||||
|
NextCommandStage(true, GetTicksForCommand());
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
static constexpr u8 response2[] = {0x02, 0x00, 0x20, 0x00, 0x53, 0x43, 0x45, 0x41}; // last byte is 0x49 for EU
|
||||||
|
m_response_fifo.PushRange(response2, countof(response2));
|
||||||
|
SetInterrupt(Interrupt::INT2);
|
||||||
|
EndCommand();
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
case Command::Setloc:
|
||||||
|
{
|
||||||
|
// TODO: Verify parameter count
|
||||||
|
m_setloc.minute = m_param_fifo.Peek(0);
|
||||||
|
m_setloc.second = m_param_fifo.Peek(1);
|
||||||
|
m_setloc.frame = m_param_fifo.Peek(2);
|
||||||
|
Log_DebugPrintf("CDROM setloc command (%u, %u, %u)", ZeroExtend32(m_setloc.minute), ZeroExtend32(m_setloc.second),
|
||||||
|
ZeroExtend32(m_setloc.frame));
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT3);
|
||||||
|
EndCommand();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
case Command::SeekL:
|
||||||
|
case Command::SeekP:
|
||||||
|
{
|
||||||
|
// TODO: Data vs audio mode
|
||||||
|
Log_DebugPrintf("CDROM seek command");
|
||||||
|
|
||||||
|
if (m_command_stage == 0)
|
||||||
|
{
|
||||||
|
StopReading();
|
||||||
|
if (!m_media || !m_media->Seek(m_setloc.minute, m_setloc.second, m_setloc.frame))
|
||||||
|
{
|
||||||
|
Panic("Error in Setloc command");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
m_secondary_status.motor_on = true;
|
||||||
|
m_secondary_status.seeking = true;
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT3);
|
||||||
|
NextCommandStage(false, 100);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
m_secondary_status.seeking = false;
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT2);
|
||||||
|
EndCommand();
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
case Command::Setmode:
|
||||||
|
{
|
||||||
|
const u8 mode = m_param_fifo.Peek(0);
|
||||||
|
Log_DebugPrintf("CDROM setmode command 0x%02X", ZeroExtend32(mode));
|
||||||
|
StopReading();
|
||||||
|
|
||||||
|
m_mode.bits = mode;
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT3);
|
||||||
|
EndCommand();
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
case Command::ReadN:
|
||||||
|
{
|
||||||
|
Log_DebugPrintf("CDROM read command");
|
||||||
|
StopReading();
|
||||||
|
EndCommand();
|
||||||
|
BeginReading();
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT3);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
case Command::Pause:
|
||||||
|
{
|
||||||
|
if (m_command_stage == 0)
|
||||||
|
{
|
||||||
|
Log_DebugPrintf("CDROM pause command");
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT3);
|
||||||
|
StopReading();
|
||||||
|
NextCommandStage(true, 100);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT2);
|
||||||
|
EndCommand();
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
}
|
}
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
default:
|
||||||
Panic("Unknown command");
|
Panic("Unknown command");
|
||||||
|
@ -298,9 +532,8 @@ void CDROM::ExecuteTestCommand(u8 subcommand)
|
||||||
Log_DebugPrintf("Get CDROM BIOS Date/Version");
|
Log_DebugPrintf("Get CDROM BIOS Date/Version");
|
||||||
static constexpr u8 response[] = {0x94, 0x09, 0x19, 0xC0};
|
static constexpr u8 response[] = {0x94, 0x09, 0x19, 0xC0};
|
||||||
m_response_fifo.PushRange(response, countof(response));
|
m_response_fifo.PushRange(response, countof(response));
|
||||||
m_param_fifo.Clear();
|
|
||||||
SetInterrupt(Interrupt::INT3);
|
SetInterrupt(Interrupt::INT3);
|
||||||
UpdateStatusRegister();
|
EndCommand();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -309,9 +542,8 @@ void CDROM::ExecuteTestCommand(u8 subcommand)
|
||||||
Log_DebugPrintf("Get CDROM region ID string");
|
Log_DebugPrintf("Get CDROM region ID string");
|
||||||
static constexpr u8 response[] = {'f', 'o', 'r', ' ', 'U', '/', 'C'};
|
static constexpr u8 response[] = {'f', 'o', 'r', ' ', 'U', '/', 'C'};
|
||||||
m_response_fifo.PushRange(response, countof(response));
|
m_response_fifo.PushRange(response, countof(response));
|
||||||
m_param_fifo.Clear();
|
|
||||||
SetInterrupt(Interrupt::INT3);
|
SetInterrupt(Interrupt::INT3);
|
||||||
UpdateStatusRegister();
|
EndCommand();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -322,3 +554,53 @@ void CDROM::ExecuteTestCommand(u8 subcommand)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void CDROM::BeginReading()
|
||||||
|
{
|
||||||
|
Log_DebugPrintf("Starting reading");
|
||||||
|
m_system->Synchronize();
|
||||||
|
|
||||||
|
m_secondary_status.motor_on = true;
|
||||||
|
m_secondary_status.seeking = false;
|
||||||
|
m_secondary_status.reading = true;
|
||||||
|
|
||||||
|
m_reading = true;
|
||||||
|
m_sector_read_remaining_ticks = 100;
|
||||||
|
m_system->SetDowncount(m_sector_read_remaining_ticks);
|
||||||
|
UpdateStatusRegister();
|
||||||
|
}
|
||||||
|
|
||||||
|
void CDROM::DoSectorRead()
|
||||||
|
{
|
||||||
|
if (HasPendingInterrupt())
|
||||||
|
{
|
||||||
|
// can't read with a pending interrupt?
|
||||||
|
m_sector_read_remaining_ticks += 100;
|
||||||
|
m_system->SetDowncount(m_sector_read_remaining_ticks);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
Log_DebugPrintf("Reading sector %llu", m_media->GetCurrentLBA());
|
||||||
|
|
||||||
|
// TODO: Error handling
|
||||||
|
u8 buffer[CDImage::RAW_SECTOR_SIZE];
|
||||||
|
m_media->Read(m_mode.read_raw_sector ? CDImage::ReadMode::RawNoSync : CDImage::ReadMode::DataOnly, 1, buffer);
|
||||||
|
m_data_fifo.Clear();
|
||||||
|
m_data_fifo.PushRange(buffer, m_mode.read_raw_sector ? CDImage::RAW_SECTOR_SIZE : CDImage::DATA_SECTOR_SIZE);
|
||||||
|
m_response_fifo.Push(m_secondary_status.bits);
|
||||||
|
SetInterrupt(Interrupt::INT1);
|
||||||
|
UpdateStatusRegister();
|
||||||
|
|
||||||
|
m_sector_read_remaining_ticks += 100;
|
||||||
|
m_system->SetDowncount(m_sector_read_remaining_ticks);
|
||||||
|
}
|
||||||
|
|
||||||
|
void CDROM::StopReading()
|
||||||
|
{
|
||||||
|
if (!m_reading)
|
||||||
|
return;
|
||||||
|
|
||||||
|
Log_DebugPrintf("Stopping reading");
|
||||||
|
m_secondary_status.reading = false;
|
||||||
|
m_reading = false;
|
||||||
|
}
|
||||||
|
|
|
@ -1,11 +1,12 @@
|
||||||
#pragma once
|
#pragma once
|
||||||
#include "types.h"
|
|
||||||
#include "common/bitfield.h"
|
#include "common/bitfield.h"
|
||||||
#include "common/fifo_queue.h"
|
#include "common/fifo_queue.h"
|
||||||
|
#include "types.h"
|
||||||
|
|
||||||
class CDImage;
|
class CDImage;
|
||||||
class StateWrapper;
|
class StateWrapper;
|
||||||
|
|
||||||
|
class System;
|
||||||
class DMA;
|
class DMA;
|
||||||
class InterruptController;
|
class InterruptController;
|
||||||
|
|
||||||
|
@ -15,7 +16,7 @@ public:
|
||||||
CDROM();
|
CDROM();
|
||||||
~CDROM();
|
~CDROM();
|
||||||
|
|
||||||
bool Initialize(DMA* dma, InterruptController* interrupt_controller);
|
bool Initialize(System* system, DMA* dma, InterruptController* interrupt_controller);
|
||||||
void Reset();
|
void Reset();
|
||||||
bool DoState(StateWrapper& sw);
|
bool DoState(StateWrapper& sw);
|
||||||
|
|
||||||
|
@ -26,8 +27,9 @@ public:
|
||||||
// I/O
|
// I/O
|
||||||
u8 ReadRegister(u32 offset);
|
u8 ReadRegister(u32 offset);
|
||||||
void WriteRegister(u32 offset, u8 value);
|
void WriteRegister(u32 offset, u8 value);
|
||||||
|
u32 DMARead();
|
||||||
|
|
||||||
void Execute();
|
void Execute(TickCount ticks);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
static constexpr u32 PARAM_FIFO_SIZE = 16;
|
static constexpr u32 PARAM_FIFO_SIZE = 16;
|
||||||
|
@ -78,27 +80,24 @@ private:
|
||||||
Reset = 0x1C,
|
Reset = 0x1C,
|
||||||
GetQ = 0x1D,
|
GetQ = 0x1D,
|
||||||
ReadTOC = 0x1E,
|
ReadTOC = 0x1E,
|
||||||
VideoCD = 0x1F,
|
VideoCD = 0x1F
|
||||||
};
|
};
|
||||||
|
|
||||||
bool HasPendingInterrupt() const { return m_interrupt_flag_register != 0; }
|
enum class CommandState : u32
|
||||||
void SetInterrupt(Interrupt interrupt);
|
|
||||||
void UpdateStatusRegister();
|
|
||||||
void ExecuteCommand(Command command);
|
|
||||||
void ExecuteTestCommand(u8 subcommand);
|
|
||||||
|
|
||||||
DMA* m_dma;
|
|
||||||
InterruptController* m_interrupt_controller;
|
|
||||||
std::unique_ptr<CDImage> m_media;
|
|
||||||
|
|
||||||
enum class State : u32
|
|
||||||
{
|
{
|
||||||
Idle
|
Idle,
|
||||||
|
WaitForExecute,
|
||||||
|
WaitForIRQClear
|
||||||
};
|
};
|
||||||
|
|
||||||
State m_state = State::Idle;
|
struct Loc
|
||||||
|
{
|
||||||
|
u8 minute;
|
||||||
|
u8 second;
|
||||||
|
u8 frame;
|
||||||
|
};
|
||||||
|
|
||||||
union
|
union StatusRegister
|
||||||
{
|
{
|
||||||
u8 bits;
|
u8 bits;
|
||||||
BitField<u8, u8, 0, 2> index;
|
BitField<u8, u8, 0, 2> index;
|
||||||
|
@ -108,9 +107,9 @@ private:
|
||||||
BitField<u8, bool, 5, 1> RSLRRDY;
|
BitField<u8, bool, 5, 1> RSLRRDY;
|
||||||
BitField<u8, bool, 6, 1> DRQSTS;
|
BitField<u8, bool, 6, 1> DRQSTS;
|
||||||
BitField<u8, bool, 7, 1> BUSYSTS;
|
BitField<u8, bool, 7, 1> BUSYSTS;
|
||||||
} m_status = {};
|
};
|
||||||
|
|
||||||
union
|
union SecondaryStatusRegister
|
||||||
{
|
{
|
||||||
u8 bits;
|
u8 bits;
|
||||||
BitField<u8, bool, 0, 1> error;
|
BitField<u8, bool, 0, 1> error;
|
||||||
|
@ -121,7 +120,59 @@ private:
|
||||||
BitField<u8, bool, 5, 1> reading;
|
BitField<u8, bool, 5, 1> reading;
|
||||||
BitField<u8, bool, 6, 1> seeking;
|
BitField<u8, bool, 6, 1> seeking;
|
||||||
BitField<u8, bool, 7, 1> playing_cdda;
|
BitField<u8, bool, 7, 1> playing_cdda;
|
||||||
} m_secondary_status = {};
|
};
|
||||||
|
|
||||||
|
union ModeRegister
|
||||||
|
{
|
||||||
|
u8 bits;
|
||||||
|
BitField<u8, bool, 0, 1> cdda;
|
||||||
|
BitField<u8, bool, 1, 1> auto_pause;
|
||||||
|
BitField<u8, bool, 2, 1> report_audio;
|
||||||
|
BitField<u8, bool, 3, 1> xa_filter;
|
||||||
|
BitField<u8, bool, 4, 1> ignore_bit;
|
||||||
|
BitField<u8, bool, 5, 1> read_raw_sector;
|
||||||
|
BitField<u8, bool, 6, 1> xa_adpcm;
|
||||||
|
BitField<u8, bool, 7, 1> double_speed;
|
||||||
|
};
|
||||||
|
|
||||||
|
union RequestRegister
|
||||||
|
{
|
||||||
|
u8 bits;
|
||||||
|
BitField<u8, bool, 5, 1> SMEN;
|
||||||
|
BitField<u8, bool, 6, 1> BFWR;
|
||||||
|
BitField<u8, bool, 7, 1> BFRD;
|
||||||
|
};
|
||||||
|
|
||||||
|
bool HasPendingInterrupt() const { return m_interrupt_flag_register != 0; }
|
||||||
|
void SetInterrupt(Interrupt interrupt);
|
||||||
|
void UpdateStatusRegister();
|
||||||
|
|
||||||
|
u32 GetTicksForCommand() const;
|
||||||
|
void BeginCommand(Command command); // also update status register
|
||||||
|
void NextCommandStage(bool wait_for_irq, u32 time);
|
||||||
|
void EndCommand(); // also updates status register
|
||||||
|
void ExecuteCommand();
|
||||||
|
void ExecuteTestCommand(u8 subcommand);
|
||||||
|
void BeginReading();
|
||||||
|
void DoSectorRead();
|
||||||
|
void StopReading();
|
||||||
|
|
||||||
|
System* m_system = nullptr;
|
||||||
|
DMA* m_dma = nullptr;
|
||||||
|
InterruptController* m_interrupt_controller = nullptr;
|
||||||
|
std::unique_ptr<CDImage> m_media;
|
||||||
|
|
||||||
|
CommandState m_command_state = CommandState::Idle;
|
||||||
|
Command m_command = Command::Sync;
|
||||||
|
u32 m_command_stage = 0;
|
||||||
|
TickCount m_command_remaining_ticks = 0;
|
||||||
|
|
||||||
|
TickCount m_sector_read_remaining_ticks = 0;
|
||||||
|
bool m_reading = false;
|
||||||
|
|
||||||
|
StatusRegister m_status = {};
|
||||||
|
SecondaryStatusRegister m_secondary_status = {};
|
||||||
|
ModeRegister m_mode = {};
|
||||||
|
|
||||||
u8 m_interrupt_enable_register = INTERRUPT_REGISTER_MASK;
|
u8 m_interrupt_enable_register = INTERRUPT_REGISTER_MASK;
|
||||||
u8 m_interrupt_flag_register = 0;
|
u8 m_interrupt_flag_register = 0;
|
||||||
|
@ -129,5 +180,6 @@ private:
|
||||||
InlineFIFOQueue<u8, PARAM_FIFO_SIZE> m_param_fifo;
|
InlineFIFOQueue<u8, PARAM_FIFO_SIZE> m_param_fifo;
|
||||||
InlineFIFOQueue<u8, RESPONSE_FIFO_SIZE> m_response_fifo;
|
InlineFIFOQueue<u8, RESPONSE_FIFO_SIZE> m_response_fifo;
|
||||||
HeapFIFOQueue<u8, DATA_FIFO_SIZE> m_data_fifo;
|
HeapFIFOQueue<u8, DATA_FIFO_SIZE> m_data_fifo;
|
||||||
};
|
|
||||||
|
|
||||||
|
Loc m_setloc = {};
|
||||||
|
};
|
||||||
|
|
|
@ -1,6 +1,7 @@
|
||||||
#include "dma.h"
|
#include "dma.h"
|
||||||
#include "YBaseLib/Log.h"
|
#include "YBaseLib/Log.h"
|
||||||
#include "bus.h"
|
#include "bus.h"
|
||||||
|
#include "cdrom.h"
|
||||||
#include "common/state_wrapper.h"
|
#include "common/state_wrapper.h"
|
||||||
#include "gpu.h"
|
#include "gpu.h"
|
||||||
Log_SetChannel(DMA);
|
Log_SetChannel(DMA);
|
||||||
|
@ -9,10 +10,11 @@ DMA::DMA() = default;
|
||||||
|
|
||||||
DMA::~DMA() = default;
|
DMA::~DMA() = default;
|
||||||
|
|
||||||
bool DMA::Initialize(Bus* bus, GPU* gpu)
|
bool DMA::Initialize(Bus* bus, GPU* gpu, CDROM* cdrom)
|
||||||
{
|
{
|
||||||
m_bus = bus;
|
m_bus = bus;
|
||||||
m_gpu = gpu;
|
m_gpu = gpu;
|
||||||
|
m_cdrom = cdrom;
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -304,9 +306,11 @@ u32 DMA::DMARead(Channel channel, PhysicalMemoryAddress dst_address, u32 remaini
|
||||||
case Channel::GPU:
|
case Channel::GPU:
|
||||||
return m_gpu->DMARead();
|
return m_gpu->DMARead();
|
||||||
|
|
||||||
|
case Channel::CDROM:
|
||||||
|
return m_cdrom->DMARead();
|
||||||
|
|
||||||
case Channel::MDECin:
|
case Channel::MDECin:
|
||||||
case Channel::MDECout:
|
case Channel::MDECout:
|
||||||
case Channel::CDROM:
|
|
||||||
case Channel::SPU:
|
case Channel::SPU:
|
||||||
case Channel::PIO:
|
case Channel::PIO:
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -7,6 +7,7 @@ class StateWrapper;
|
||||||
|
|
||||||
class Bus;
|
class Bus;
|
||||||
class GPU;
|
class GPU;
|
||||||
|
class CDROM;
|
||||||
|
|
||||||
class DMA
|
class DMA
|
||||||
{
|
{
|
||||||
|
@ -30,7 +31,7 @@ public:
|
||||||
DMA();
|
DMA();
|
||||||
~DMA();
|
~DMA();
|
||||||
|
|
||||||
bool Initialize(Bus* bus, GPU* gpu);
|
bool Initialize(Bus* bus, GPU* gpu, CDROM* cdrom);
|
||||||
void Reset();
|
void Reset();
|
||||||
bool DoState(StateWrapper& sw);
|
bool DoState(StateWrapper& sw);
|
||||||
|
|
||||||
|
@ -63,6 +64,7 @@ private:
|
||||||
|
|
||||||
Bus* m_bus = nullptr;
|
Bus* m_bus = nullptr;
|
||||||
GPU* m_gpu = nullptr;
|
GPU* m_gpu = nullptr;
|
||||||
|
CDROM* m_cdrom = nullptr;
|
||||||
|
|
||||||
struct ChannelState
|
struct ChannelState
|
||||||
{
|
{
|
||||||
|
|
|
@ -37,7 +37,7 @@ bool System::Initialize()
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!m_dma->Initialize(m_bus.get(), m_gpu.get()))
|
if (!m_dma->Initialize(m_bus.get(), m_gpu.get(), m_cdrom.get()))
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (!m_interrupt_controller->Initialize(m_cpu.get()))
|
if (!m_interrupt_controller->Initialize(m_cpu.get()))
|
||||||
|
@ -46,7 +46,7 @@ bool System::Initialize()
|
||||||
if (!m_gpu->Initialize(this, m_dma.get(), m_interrupt_controller.get(), m_timers.get()))
|
if (!m_gpu->Initialize(this, m_dma.get(), m_interrupt_controller.get(), m_timers.get()))
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (!m_cdrom->Initialize(m_dma.get(), m_interrupt_controller.get()))
|
if (!m_cdrom->Initialize(this, m_dma.get(), m_interrupt_controller.get()))
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
if (!m_pad->Initialize(m_interrupt_controller.get()))
|
if (!m_pad->Initialize(m_interrupt_controller.get()))
|
||||||
|
@ -218,6 +218,7 @@ void System::Synchronize()
|
||||||
|
|
||||||
m_gpu->Execute(pending_ticks);
|
m_gpu->Execute(pending_ticks);
|
||||||
m_timers->AddSystemTicks(pending_ticks);
|
m_timers->AddSystemTicks(pending_ticks);
|
||||||
|
m_cdrom->Execute(pending_ticks);
|
||||||
}
|
}
|
||||||
|
|
||||||
void System::SetDowncount(TickCount downcount)
|
void System::SetDowncount(TickCount downcount)
|
||||||
|
|
Loading…
Reference in a new issue