diff --git a/src/common/types.h b/src/common/types.h
index c016931d8..3ea9afe0d 100644
--- a/src/common/types.h
+++ b/src/common/types.h
@@ -46,9 +46,15 @@ char (&__countof_ArraySizeHelper(T (&array)[N]))[N];
 #endif
 #endif
 
-// offsetof macro
-#ifndef offsetof
-#define offsetof(st, m) ((size_t)((char*)&((st*)(0))->m - (char*)0))
+// offsetof macro. Need to use __builtin_offsetof(), otherwise it doesn't work in constant expressions.
+#if defined(__clang__) || defined(__GNUC__)
+#define OFFSETOF(st, m) __builtin_offsetof(st, m)
+#else
+#ifdef offsetof
+#define OFFSETOF(st, m) offsetof(st, m)
+#else
+#define OFFSETOF(st, m) ((size_t)((char*)&((st*)(0))->m - (char*)0))
+#endif
 #endif
 
 #ifdef __GNUC__
diff --git a/src/core/cpu_core.h b/src/core/cpu_core.h
index 16c2373c0..40d0f694f 100644
--- a/src/core/cpu_core.h
+++ b/src/core/cpu_core.h
@@ -114,8 +114,8 @@ struct State
 
   std::array<u8, SCRATCHPAD_SIZE> scratchpad = {};
 
-  static constexpr u32 GPRRegisterOffset(u32 index) { return offsetof(State, regs.r) + (sizeof(u32) * index); }
-  static constexpr u32 GTERegisterOffset(u32 index) { return offsetof(State, gte_regs.r32) + (sizeof(u32) * index); }
+  static constexpr u32 GPRRegisterOffset(u32 index) { return OFFSETOF(State, regs.r) + (sizeof(u32) * index); }
+  static constexpr u32 GTERegisterOffset(u32 index) { return OFFSETOF(State, gte_regs.r32) + (sizeof(u32) * index); }
 };
 
 extern State g_state;
diff --git a/src/core/cpu_newrec_compiler_aarch32.cpp b/src/core/cpu_newrec_compiler_aarch32.cpp
index 88df0bede..3f0323cce 100644
--- a/src/core/cpu_newrec_compiler_aarch32.cpp
+++ b/src/core/cpu_newrec_compiler_aarch32.cpp
@@ -325,7 +325,7 @@ void CPU::NewRec::AArch32Compiler::GenerateICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
 
       Label cache_hit;
       armAsm->ldr(existing_tag_reg, MemOperand(RSTATE, offset));
@@ -654,7 +654,7 @@ void CPU::NewRec::AArch32Compiler::Flush(u32 flags)
     // TODO: make it a function?
     armAsm->ldrb(RARG1, PTR(&g_state.load_delay_reg));
     armAsm->ldr(RARG2, PTR(&g_state.load_delay_value));
-    EmitMov(RSCRATCH, offsetof(CPU::State, regs.r[0]));
+    EmitMov(RSCRATCH, OFFSETOF(CPU::State, regs.r[0]));
     armAsm->add(RARG1, RSCRATCH, vixl::aarch32::Operand(RARG1, LSL, 2));
     armAsm->str(RARG2, MemOperand(RSTATE, RARG1));
     EmitMov(RSCRATCH, static_cast<u8>(Reg::count));
diff --git a/src/core/cpu_newrec_compiler_aarch64.cpp b/src/core/cpu_newrec_compiler_aarch64.cpp
index 4a30afac2..2a4615d6e 100644
--- a/src/core/cpu_newrec_compiler_aarch64.cpp
+++ b/src/core/cpu_newrec_compiler_aarch64.cpp
@@ -297,7 +297,7 @@ void CPU::NewRec::AArch64Compiler::GenerateICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
 
       Label cache_hit;
       armAsm->ldr(existing_tag_reg, MemOperand(RSTATE, offset));
@@ -624,7 +624,7 @@ void CPU::NewRec::AArch64Compiler::Flush(u32 flags)
     // TODO: make it a function?
     armAsm->ldrb(RWARG1, PTR(&g_state.load_delay_reg));
     armAsm->ldr(RWARG2, PTR(&g_state.load_delay_value));
-    EmitMov(RWSCRATCH, offsetof(CPU::State, regs.r[0]));
+    EmitMov(RWSCRATCH, OFFSETOF(CPU::State, regs.r[0]));
     armAsm->add(RWARG1, RWSCRATCH, vixl::aarch64::Operand(RWARG1, LSL, 2));
     armAsm->str(RWARG2, MemOperand(RSTATE, RXARG1));
     EmitMov(RWSCRATCH, static_cast<u8>(Reg::count));
diff --git a/src/core/cpu_newrec_compiler_riscv64.cpp b/src/core/cpu_newrec_compiler_riscv64.cpp
index 7cb29d5ee..bcac1e227 100644
--- a/src/core/cpu_newrec_compiler_riscv64.cpp
+++ b/src/core/cpu_newrec_compiler_riscv64.cpp
@@ -226,7 +226,7 @@ u32 CPU::CodeCache::EmitASMFunctions(void* code, u32 code_size)
     // Downcount isn't set on entry, so we need to initialize it
     rvMoveAddressToReg(rvAsm, RARG1, TimingEvents::GetHeadEventPtr());
     rvAsm->LD(RARG1, 0, RARG1);
-    rvAsm->LW(RARG1, offsetof(TimingEvent, m_downcount), RARG1);
+    rvAsm->LW(RARG1, OFFSETOF(TimingEvent, m_downcount), RARG1);
     rvAsm->SW(RARG1, PTR(&g_state.downcount));
 
     // Fall through to event dispatcher
@@ -545,7 +545,7 @@ void CPU::NewRec::RISCV64Compiler::GenerateICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
 
       // TODO: Verify sign extension here...
       Label cache_hit;
@@ -900,7 +900,7 @@ void CPU::NewRec::RISCV64Compiler::Flush(u32 flags)
     rvAsm->LW(RARG2, PTR(&g_state.load_delay_value));
     rvAsm->SLLI(RARG1, RARG1, 2); // *4
     rvAsm->ADD(RARG1, RARG1, RSTATE);
-    rvAsm->SW(RARG2, offsetof(CPU::State, regs.r[0]), RARG1);
+    rvAsm->SW(RARG2, OFFSETOF(CPU::State, regs.r[0]), RARG1);
     rvAsm->LI(RSCRATCH, static_cast<u8>(Reg::count));
     rvAsm->SB(RSCRATCH, PTR(&g_state.load_delay_reg));
     m_load_delay_dirty = false;
diff --git a/src/core/cpu_recompiler_code_generator.cpp b/src/core/cpu_recompiler_code_generator.cpp
index 40b5cd0e9..bebff86a1 100644
--- a/src/core/cpu_recompiler_code_generator.cpp
+++ b/src/core/cpu_recompiler_code_generator.cpp
@@ -986,7 +986,7 @@ void CodeGenerator::BlockPrologue()
     EmitBlockProtectCheck(ram_ptr, shadow_ptr, m_block->size * sizeof(Instruction));
   }
 
-  EmitStoreCPUStructField(offsetof(State, exception_raised), Value::FromConstantU8(0));
+  EmitStoreCPUStructField(OFFSETOF(State, exception_raised), Value::FromConstantU8(0));
 
   if (g_settings.bios_tty_logging)
   {
@@ -1036,21 +1036,21 @@ void CodeGenerator::InstructionPrologue(Instruction instruction, const CodeCache
   if (m_branch_was_taken_dirty)
   {
     Value temp = m_register_cache.AllocateScratch(RegSize_8);
-    EmitLoadCPUStructField(temp.host_reg, RegSize_8, offsetof(State, branch_was_taken));
-    EmitStoreCPUStructField(offsetof(State, current_instruction_was_branch_taken), temp);
-    EmitStoreCPUStructField(offsetof(State, branch_was_taken), Value::FromConstantU8(0));
+    EmitLoadCPUStructField(temp.host_reg, RegSize_8, OFFSETOF(State, branch_was_taken));
+    EmitStoreCPUStructField(OFFSETOF(State, current_instruction_was_branch_taken), temp);
+    EmitStoreCPUStructField(OFFSETOF(State, branch_was_taken), Value::FromConstantU8(0));
     m_current_instruction_was_branch_taken_dirty = true;
     m_branch_was_taken_dirty = false;
   }
   else if (m_current_instruction_was_branch_taken_dirty)
   {
-    EmitStoreCPUStructField(offsetof(State, current_instruction_was_branch_taken), Value::FromConstantU8(0));
+    EmitStoreCPUStructField(OFFSETOF(State, current_instruction_was_branch_taken), Value::FromConstantU8(0));
     m_current_instruction_was_branch_taken_dirty = false;
   }
 
   if (m_current_instruction_in_branch_delay_slot_dirty && !info.is_branch_delay_slot)
   {
-    EmitStoreCPUStructField(offsetof(State, current_instruction_in_branch_delay_slot), Value::FromConstantU8(0));
+    EmitStoreCPUStructField(OFFSETOF(State, current_instruction_in_branch_delay_slot), Value::FromConstantU8(0));
     m_current_instruction_in_branch_delay_slot_dirty = false;
   }
 
@@ -1064,7 +1064,7 @@ void CodeGenerator::InstructionPrologue(Instruction instruction, const CodeCache
   if (info.is_branch_delay_slot && g_settings.cpu_recompiler_memory_exceptions)
   {
     // m_current_instruction_in_branch_delay_slot = true
-    EmitStoreCPUStructField(offsetof(State, current_instruction_in_branch_delay_slot), Value::FromConstantU8(1));
+    EmitStoreCPUStructField(OFFSETOF(State, current_instruction_in_branch_delay_slot), Value::FromConstantU8(1));
     m_current_instruction_in_branch_delay_slot_dirty = true;
   }
 
@@ -1111,24 +1111,24 @@ void CodeGenerator::AddPendingCycles(bool commit)
   if (m_gte_done_cycle > m_delayed_cycles_add)
   {
     Value temp = m_register_cache.AllocateScratch(RegSize_32);
-    EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, offsetof(State, pending_ticks));
+    EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, OFFSETOF(State, pending_ticks));
     if (m_delayed_cycles_add > 0)
     {
       EmitAdd(temp.GetHostRegister(), temp.GetHostRegister(), Value::FromConstantU32(m_delayed_cycles_add), false);
-      EmitStoreCPUStructField(offsetof(State, pending_ticks), temp);
+      EmitStoreCPUStructField(OFFSETOF(State, pending_ticks), temp);
       EmitAdd(temp.GetHostRegister(), temp.GetHostRegister(),
               Value::FromConstantU32(m_gte_done_cycle - m_delayed_cycles_add), false);
-      EmitStoreCPUStructField(offsetof(State, gte_completion_tick), temp);
+      EmitStoreCPUStructField(OFFSETOF(State, gte_completion_tick), temp);
     }
     else
     {
       EmitAdd(temp.GetHostRegister(), temp.GetHostRegister(), Value::FromConstantU32(m_gte_done_cycle), false);
-      EmitStoreCPUStructField(offsetof(State, gte_completion_tick), temp);
+      EmitStoreCPUStructField(OFFSETOF(State, gte_completion_tick), temp);
     }
   }
   else
   {
-    EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(m_delayed_cycles_add));
+    EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(m_delayed_cycles_add));
   }
 
   if (commit)
@@ -1180,7 +1180,7 @@ Value CodeGenerator::GetCurrentInstructionPC(u32 offset /* = 0 */)
 void CodeGenerator::WriteNewPC(const Value& value, bool commit)
 {
   // TODO: This _could_ be moved into the register cache, but would it gain anything?
-  EmitStoreCPUStructField(offsetof(CPU::State, pc), value);
+  EmitStoreCPUStructField(OFFSETOF(CPU::State, pc), value);
   if (commit)
   {
     m_pc_valid = value.IsConstant();
@@ -1201,8 +1201,8 @@ bool CodeGenerator::Compile_Fallback(Instruction instruction, const CodeCache::I
     m_register_cache.WriteLoadDelayToCPU(true);
   }
 
-  EmitStoreCPUStructField(offsetof(State, current_instruction_pc), Value::FromConstantU32(info.pc));
-  EmitStoreCPUStructField(offsetof(State, current_instruction.bits), Value::FromConstantU32(instruction.bits));
+  EmitStoreCPUStructField(OFFSETOF(State, current_instruction_pc), Value::FromConstantU32(info.pc));
+  EmitStoreCPUStructField(OFFSETOF(State, current_instruction.bits), Value::FromConstantU32(instruction.bits));
 
   // emit the function call
   if (CanInstructionTrap(instruction, false /*m_block->key.user_mode*/))
@@ -2404,7 +2404,7 @@ bool CodeGenerator::Compile_Branch(Instruction instruction, const CodeCache::Ins
       EmitBindLabel(&branch_okay);
 
       SwitchToFarCode();
-      EmitStoreCPUStructField(offsetof(State, cop0_regs.BadVaddr), branch_target);
+      EmitStoreCPUStructField(OFFSETOF(State, cop0_regs.BadVaddr), branch_target);
       EmitFunctionCall(
         nullptr, static_cast<void (*)(u32, u32)>(&CPU::RaiseException),
         Value::FromConstantU32(Cop0Registers::CAUSE::MakeValueForException(Exception::AdEL, false, false, 0)),
@@ -2433,8 +2433,8 @@ bool CodeGenerator::Compile_Branch(Instruction instruction, const CodeCache::Ins
       // check downcount
       Value pending_ticks = m_register_cache.AllocateScratch(RegSize_32);
       Value downcount = m_register_cache.AllocateScratch(RegSize_32);
-      EmitLoadCPUStructField(pending_ticks.GetHostRegister(), RegSize_32, offsetof(State, pending_ticks));
-      EmitLoadCPUStructField(downcount.GetHostRegister(), RegSize_32, offsetof(State, downcount));
+      EmitLoadCPUStructField(pending_ticks.GetHostRegister(), RegSize_32, OFFSETOF(State, pending_ticks));
+      EmitLoadCPUStructField(downcount.GetHostRegister(), RegSize_32, OFFSETOF(State, downcount));
 
       // pending < downcount
       LabelType return_to_dispatcher;
@@ -2666,53 +2666,53 @@ bool CodeGenerator::Compile_cop0(Instruction instruction, const CodeCache::Instr
         switch (reg)
         {
           case Cop0Reg::BPC:
-            offset = offsetof(State, cop0_regs.BPC);
+            offset = OFFSETOF(State, cop0_regs.BPC);
             break;
 
           case Cop0Reg::BPCM:
-            offset = offsetof(State, cop0_regs.BPCM);
+            offset = OFFSETOF(State, cop0_regs.BPCM);
             break;
 
           case Cop0Reg::BDA:
-            offset = offsetof(State, cop0_regs.BDA);
+            offset = OFFSETOF(State, cop0_regs.BDA);
             break;
 
           case Cop0Reg::BDAM:
-            offset = offsetof(State, cop0_regs.BDAM);
+            offset = OFFSETOF(State, cop0_regs.BDAM);
             break;
 
           case Cop0Reg::DCIC:
-            offset = offsetof(State, cop0_regs.dcic.bits);
+            offset = OFFSETOF(State, cop0_regs.dcic.bits);
             write_mask = Cop0Registers::DCIC::WRITE_MASK;
             break;
 
           case Cop0Reg::JUMPDEST:
-            offset = offsetof(State, cop0_regs.TAR);
+            offset = OFFSETOF(State, cop0_regs.TAR);
             write_mask = 0;
             break;
 
           case Cop0Reg::BadVaddr:
-            offset = offsetof(State, cop0_regs.BadVaddr);
+            offset = OFFSETOF(State, cop0_regs.BadVaddr);
             write_mask = 0;
             break;
 
           case Cop0Reg::SR:
-            offset = offsetof(State, cop0_regs.sr.bits);
+            offset = OFFSETOF(State, cop0_regs.sr.bits);
             write_mask = Cop0Registers::SR::WRITE_MASK;
             break;
 
           case Cop0Reg::CAUSE:
-            offset = offsetof(State, cop0_regs.cause.bits);
+            offset = OFFSETOF(State, cop0_regs.cause.bits);
             write_mask = Cop0Registers::CAUSE::WRITE_MASK;
             break;
 
           case Cop0Reg::EPC:
-            offset = offsetof(State, cop0_regs.EPC);
+            offset = OFFSETOF(State, cop0_regs.EPC);
             write_mask = 0;
             break;
 
           case Cop0Reg::PRID:
-            offset = offsetof(State, cop0_regs.PRID);
+            offset = OFFSETOF(State, cop0_regs.PRID);
             write_mask = 0;
             break;
 
@@ -2804,8 +2804,8 @@ bool CodeGenerator::Compile_cop0(Instruction instruction, const CodeCache::Instr
 
             // m_cop0_regs.sr.IEc && ((m_cop0_regs.cause.Ip & m_cop0_regs.sr.Im) != 0)
             LabelType no_interrupt;
-            EmitLoadCPUStructField(sr_value.host_reg, sr_value.size, offsetof(State, cop0_regs.sr.bits));
-            EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, offsetof(State, cop0_regs.cause.bits));
+            EmitLoadCPUStructField(sr_value.host_reg, sr_value.size, OFFSETOF(State, cop0_regs.sr.bits));
+            EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, OFFSETOF(State, cop0_regs.cause.bits));
             EmitBranchIfBitClear(sr_value.host_reg, sr_value.size, 0, &no_interrupt);
             EmitAnd(sr_value.host_reg, sr_value.host_reg, cause_value);
             EmitTest(sr_value.host_reg, Value::FromConstantU32(0xFF00));
@@ -2817,7 +2817,7 @@ bool CodeGenerator::Compile_cop0(Instruction instruction, const CodeCache::Instr
             m_register_cache.PushState();
             if (!info.is_last_instruction)
               WriteNewPC(CalculatePC(), false);
-            EmitStoreCPUStructField(offsetof(State, downcount), Value::FromConstantU32(0));
+            EmitStoreCPUStructField(OFFSETOF(State, downcount), Value::FromConstantU32(0));
             EmitExceptionExit();
             m_register_cache.PopState();
             SwitchToNearCode();
@@ -2831,21 +2831,21 @@ bool CodeGenerator::Compile_cop0(Instruction instruction, const CodeCache::Instr
 
             // if ((dcic & master_enable_bits) != master_enable_bits) goto not_enabled;
             LabelType not_enabled;
-            EmitLoadCPUStructField(dcic_value.GetHostRegister(), dcic_value.size, offsetof(State, cop0_regs.dcic.bits));
+            EmitLoadCPUStructField(dcic_value.GetHostRegister(), dcic_value.size, OFFSETOF(State, cop0_regs.dcic.bits));
             EmitAnd(dcic_value.GetHostRegister(), dcic_value.GetHostRegister(),
                     Value::FromConstantU32(Cop0Registers::DCIC::MASTER_ENABLE_BITS));
             EmitConditionalBranch(Condition::NotEqual, false, dcic_value.host_reg,
                                   Value::FromConstantU32(Cop0Registers::DCIC::MASTER_ENABLE_BITS), &not_enabled);
 
             // if ((dcic & breakpoint_bits) == 0) goto not_enabled;
-            EmitLoadCPUStructField(dcic_value.GetHostRegister(), dcic_value.size, offsetof(State, cop0_regs.dcic.bits));
+            EmitLoadCPUStructField(dcic_value.GetHostRegister(), dcic_value.size, OFFSETOF(State, cop0_regs.dcic.bits));
             EmitTest(dcic_value.GetHostRegister(),
                      Value::FromConstantU32(Cop0Registers::DCIC::ANY_BREAKPOINTS_ENABLED_BITS));
             EmitConditionalBranch(Condition::Zero, false, &not_enabled);
 
             // update dispatcher flag, if enabled, exit block
             EmitFunctionCall(nullptr, &UpdateDebugDispatcherFlag);
-            EmitLoadCPUStructField(dcic_value.GetHostRegister(), RegSize_8, offsetof(State, use_debug_dispatcher));
+            EmitLoadCPUStructField(dcic_value.GetHostRegister(), RegSize_8, OFFSETOF(State, use_debug_dispatcher));
             EmitBranchIfBitClear(dcic_value.GetHostRegister(), RegSize_8, 0, &not_enabled);
 
             m_register_cache.UninhibitAllocation();
@@ -2883,7 +2883,7 @@ bool CodeGenerator::Compile_cop0(Instruction instruction, const CodeCache::Instr
         // shift mode bits right two, preserving upper bits
         static constexpr u32 mode_bits_mask = UINT32_C(0b1111);
         Value sr = m_register_cache.AllocateScratch(RegSize_32);
-        EmitLoadCPUStructField(sr.host_reg, RegSize_32, offsetof(State, cop0_regs.sr.bits));
+        EmitLoadCPUStructField(sr.host_reg, RegSize_32, OFFSETOF(State, cop0_regs.sr.bits));
         {
           Value new_mode_bits = m_register_cache.AllocateScratch(RegSize_32);
           EmitShr(new_mode_bits.host_reg, sr.host_reg, new_mode_bits.size, Value::FromConstantU32(2));
@@ -2892,17 +2892,17 @@ bool CodeGenerator::Compile_cop0(Instruction instruction, const CodeCache::Instr
           EmitOr(sr.host_reg, sr.host_reg, new_mode_bits);
         }
 
-        EmitStoreCPUStructField(offsetof(State, cop0_regs.sr.bits), sr);
+        EmitStoreCPUStructField(OFFSETOF(State, cop0_regs.sr.bits), sr);
 
         Value cause_value = m_register_cache.AllocateScratch(RegSize_32);
-        EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, offsetof(State, cop0_regs.cause.bits));
+        EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, OFFSETOF(State, cop0_regs.cause.bits));
 
         LabelType no_interrupt;
         EmitAnd(sr.host_reg, sr.host_reg, cause_value);
         EmitTest(sr.host_reg, Value::FromConstantU32(0xFF00));
         EmitConditionalBranch(Condition::Zero, false, &no_interrupt);
         m_register_cache.InhibitAllocation();
-        EmitStoreCPUStructField(offsetof(State, downcount), Value::FromConstantU32(0));
+        EmitStoreCPUStructField(OFFSETOF(State, downcount), Value::FromConstantU32(0));
         EmitBindLabel(&no_interrupt);
         m_register_cache.UninhibitAllocation();
 
diff --git a/src/core/cpu_recompiler_code_generator_aarch32.cpp b/src/core/cpu_recompiler_code_generator_aarch32.cpp
index 1c162f209..b1d7cb989 100644
--- a/src/core/cpu_recompiler_code_generator_aarch32.cpp
+++ b/src/core/cpu_recompiler_code_generator_aarch32.cpp
@@ -1421,7 +1421,7 @@ void CodeGenerator::EnsureMembaseLoaded()
   if (m_membase_loaded)
     return;
 
-  m_emit->Ldr(GetFastmemBasePtrReg(), a32::MemOperand(GetCPUPtrReg(), offsetof(State, fastmem_base)));
+  m_emit->Ldr(GetFastmemBasePtrReg(), a32::MemOperand(GetCPUPtrReg(), OFFSETOF(State, fastmem_base)));
   m_membase_loaded = true;
 }
 
@@ -1521,12 +1521,12 @@ void CodeGenerator::EmitLoadGuestMemoryFastmem(Instruction instruction, const Co
 
   // we add the ticks *after* the add here, since we counted incorrectly, then correct for it below
   DebugAssert(m_delayed_cycles_add > 0);
-  EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
   m_delayed_cycles_add += Bus::RAM_READ_TICKS;
 
   EmitLoadGuestMemorySlowmem(instruction, info, address, size, result, true);
 
-  EmitAddCPUStructField(offsetof(State, pending_ticks),
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                         Value::FromConstantU32(static_cast<u32>(-m_delayed_cycles_add)));
 
   // return to the block code
@@ -1670,11 +1670,11 @@ void CodeGenerator::EmitStoreGuestMemoryFastmem(Instruction instruction, const C
   SwitchToFarCode();
 
   DebugAssert(m_delayed_cycles_add > 0);
-  EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
 
   EmitStoreGuestMemorySlowmem(instruction, info, address, size, actual_value, true);
 
-  EmitAddCPUStructField(offsetof(State, pending_ticks),
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                         Value::FromConstantU32(static_cast<u32>(-m_delayed_cycles_add)));
 
   // return to the block code
@@ -1845,9 +1845,9 @@ void CodeGenerator::EmitFlushInterpreterLoadDelay()
   Value reg = Value::FromHostReg(&m_register_cache, 0, RegSize_32);
   Value value = Value::FromHostReg(&m_register_cache, 1, RegSize_32);
 
-  const a32::MemOperand load_delay_reg(GetCPUPtrReg(), offsetof(State, load_delay_reg));
-  const a32::MemOperand load_delay_value(GetCPUPtrReg(), offsetof(State, load_delay_value));
-  const a32::MemOperand regs_base(GetCPUPtrReg(), offsetof(State, regs.r[0]));
+  const a32::MemOperand load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, load_delay_reg));
+  const a32::MemOperand load_delay_value(GetCPUPtrReg(), OFFSETOF(State, load_delay_value));
+  const a32::MemOperand regs_base(GetCPUPtrReg(), OFFSETOF(State, regs.r[0]));
 
   a32::Label skip_flush;
 
@@ -1863,7 +1863,7 @@ void CodeGenerator::EmitFlushInterpreterLoadDelay()
 
   // reg = offset(r[0] + reg << 2)
   m_emit->Lsl(GetHostReg32(reg), GetHostReg32(reg), 2);
-  m_emit->Add(GetHostReg32(reg), GetHostReg32(reg), offsetof(State, regs.r[0]));
+  m_emit->Add(GetHostReg32(reg), GetHostReg32(reg), OFFSETOF(State, regs.r[0]));
 
   // r[reg] = value
   m_emit->Str(GetHostReg32(value), a32::MemOperand(GetCPUPtrReg(), GetHostReg32(reg)));
@@ -1880,10 +1880,10 @@ void CodeGenerator::EmitMoveNextInterpreterLoadDelay()
   Value reg = Value::FromHostReg(&m_register_cache, 0, RegSize_32);
   Value value = Value::FromHostReg(&m_register_cache, 1, RegSize_32);
 
-  const a32::MemOperand load_delay_reg(GetCPUPtrReg(), offsetof(State, load_delay_reg));
-  const a32::MemOperand load_delay_value(GetCPUPtrReg(), offsetof(State, load_delay_value));
-  const a32::MemOperand next_load_delay_reg(GetCPUPtrReg(), offsetof(State, next_load_delay_reg));
-  const a32::MemOperand next_load_delay_value(GetCPUPtrReg(), offsetof(State, next_load_delay_value));
+  const a32::MemOperand load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, load_delay_reg));
+  const a32::MemOperand load_delay_value(GetCPUPtrReg(), OFFSETOF(State, load_delay_value));
+  const a32::MemOperand next_load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, next_load_delay_reg));
+  const a32::MemOperand next_load_delay_value(GetCPUPtrReg(), OFFSETOF(State, next_load_delay_value));
 
   m_emit->ldrb(GetHostReg32(reg), next_load_delay_reg);
   m_emit->ldr(GetHostReg32(value), next_load_delay_value);
@@ -1898,7 +1898,7 @@ void CodeGenerator::EmitCancelInterpreterLoadDelayForReg(Reg reg)
   if (!m_load_delay_dirty)
     return;
 
-  const a32::MemOperand load_delay_reg(GetCPUPtrReg(), offsetof(State, load_delay_reg));
+  const a32::MemOperand load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, load_delay_reg));
   Value temp = Value::FromHostReg(&m_register_cache, RSCRATCH, RegSize_8);
 
   a32::Label skip_cancel;
@@ -1919,7 +1919,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
 {
   if (GetSegmentForAddress(m_pc) >= Segment::KSEG1)
   {
-    EmitAddCPUStructField(offsetof(State, pending_ticks),
+    EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                           Value::FromConstantU32(static_cast<u32>(m_block->uncached_fetch_ticks)));
   }
   else
@@ -1929,7 +1929,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
     const auto& existing_tag_reg = a32::r2;
 
     VirtualMemoryAddress current_pc = m_pc & ICACHE_TAG_ADDRESS_MASK;
-    m_emit->ldr(ticks_reg, a32::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+    m_emit->ldr(ticks_reg, a32::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
     m_emit->Mov(current_tag_reg, current_pc);
 
     for (u32 i = 0; i < m_block->icache_line_count; i++, current_pc += ICACHE_LINE_SIZE)
@@ -1939,7 +1939,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
 
       a32::Label cache_hit;
       m_emit->ldr(existing_tag_reg, a32::MemOperand(GetCPUPtrReg(), offset));
@@ -1954,7 +1954,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
         m_emit->add(current_tag_reg, current_tag_reg, ICACHE_LINE_SIZE);
     }
 
-    m_emit->str(ticks_reg, a32::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+    m_emit->str(ticks_reg, a32::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
   }
 }
 
@@ -2036,10 +2036,10 @@ bool foo(const void* a, const void* b)
 
 void CodeGenerator::EmitStallUntilGTEComplete()
 {
-  static_assert(offsetof(State, pending_ticks) + sizeof(u32) == offsetof(State, gte_completion_tick));
+  static_assert(OFFSETOF(State, pending_ticks) + sizeof(u32) == OFFSETOF(State, gte_completion_tick));
 
-  m_emit->ldr(GetHostReg32(RARG1), a32::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
-  m_emit->ldr(GetHostReg32(RARG2), a32::MemOperand(GetCPUPtrReg(), offsetof(State, gte_completion_tick)));
+  m_emit->ldr(GetHostReg32(RARG1), a32::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
+  m_emit->ldr(GetHostReg32(RARG2), a32::MemOperand(GetCPUPtrReg(), OFFSETOF(State, gte_completion_tick)));
 
   if (m_delayed_cycles_add > 0)
   {
@@ -2049,7 +2049,7 @@ void CodeGenerator::EmitStallUntilGTEComplete()
 
   m_emit->cmp(GetHostReg32(RARG2), GetHostReg32(RARG1));
   m_emit->mov(a32::hi, GetHostReg32(RARG1), GetHostReg32(RARG2));
-  m_emit->str(GetHostReg32(RARG1), a32::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+  m_emit->str(GetHostReg32(RARG1), a32::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
 }
 
 void CodeGenerator::EmitBranch(const void* address, bool allow_scratch)
diff --git a/src/core/cpu_recompiler_code_generator_aarch64.cpp b/src/core/cpu_recompiler_code_generator_aarch64.cpp
index 63d2d0256..58b336f48 100644
--- a/src/core/cpu_recompiler_code_generator_aarch64.cpp
+++ b/src/core/cpu_recompiler_code_generator_aarch64.cpp
@@ -603,7 +603,7 @@ void CodeGenerator::EmitBeginBlock(bool allocate_registers /* = true */)
     {
       const bool fastmem_reg_allocated = m_register_cache.AllocateHostReg(RMEMBASEPTR);
       Assert(fastmem_reg_allocated);
-      m_emit->Ldr(GetFastmemBasePtrReg(), a64::MemOperand(GetCPUPtrReg(), offsetof(State, fastmem_base)));
+      m_emit->Ldr(GetFastmemBasePtrReg(), a64::MemOperand(GetCPUPtrReg(), OFFSETOF(State, fastmem_base)));
     }
   }
 }
@@ -1811,12 +1811,12 @@ void CodeGenerator::EmitLoadGuestMemoryFastmem(Instruction instruction, const Co
 
   // we add the ticks *after* the add here, since we counted incorrectly, then correct for it below
   DebugAssert(m_delayed_cycles_add > 0);
-  EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
   m_delayed_cycles_add += Bus::RAM_READ_TICKS;
 
   EmitLoadGuestMemorySlowmem(instruction, info, address, size, result, true);
 
-  EmitAddCPUStructField(offsetof(State, pending_ticks),
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                         Value::FromConstantU32(static_cast<u32>(-m_delayed_cycles_add)));
 
   // return to the block code
@@ -1959,11 +1959,11 @@ void CodeGenerator::EmitStoreGuestMemoryFastmem(Instruction instruction, const C
   SwitchToFarCode();
 
   DebugAssert(m_delayed_cycles_add > 0);
-  EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
 
   EmitStoreGuestMemorySlowmem(instruction, info, address, size, value_in_hr, true);
 
-  EmitAddCPUStructField(offsetof(State, pending_ticks),
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                         Value::FromConstantU32(static_cast<u32>(-m_delayed_cycles_add)));
 
   // return to the block code
@@ -2054,7 +2054,7 @@ void CodeGenerator::EmitStoreGuestMemorySlowmem(Instruction instruction, const C
 
 void CodeGenerator::EmitUpdateFastmemBase()
 {
-  m_emit->Ldr(GetFastmemBasePtrReg(), a64::MemOperand(GetCPUPtrReg(), offsetof(State, fastmem_base)));
+  m_emit->Ldr(GetFastmemBasePtrReg(), a64::MemOperand(GetCPUPtrReg(), OFFSETOF(State, fastmem_base)));
 }
 
 void CodeGenerator::BackpatchLoadStore(void* host_pc, const CodeCache::LoadstoreBackpatchInfo& lbi)
@@ -2132,9 +2132,9 @@ void CodeGenerator::EmitFlushInterpreterLoadDelay()
   Value reg = m_register_cache.AllocateScratch(RegSize_32);
   Value value = m_register_cache.AllocateScratch(RegSize_32);
 
-  const a64::MemOperand load_delay_reg(GetCPUPtrReg(), offsetof(State, load_delay_reg));
-  const a64::MemOperand load_delay_value(GetCPUPtrReg(), offsetof(State, load_delay_value));
-  const a64::MemOperand regs_base(GetCPUPtrReg(), offsetof(State, regs.r[0]));
+  const a64::MemOperand load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, load_delay_reg));
+  const a64::MemOperand load_delay_value(GetCPUPtrReg(), OFFSETOF(State, load_delay_value));
+  const a64::MemOperand regs_base(GetCPUPtrReg(), OFFSETOF(State, regs.r[0]));
 
   a64::Label skip_flush;
 
@@ -2150,7 +2150,7 @@ void CodeGenerator::EmitFlushInterpreterLoadDelay()
 
   // reg = offset(r[0] + reg << 2)
   m_emit->Lsl(GetHostReg32(reg), GetHostReg32(reg), 2);
-  m_emit->Add(GetHostReg32(reg), GetHostReg32(reg), offsetof(State, regs.r[0]));
+  m_emit->Add(GetHostReg32(reg), GetHostReg32(reg), OFFSETOF(State, regs.r[0]));
 
   // r[reg] = value
   m_emit->Str(GetHostReg32(value), a64::MemOperand(GetCPUPtrReg(), GetHostReg32(reg)));
@@ -2167,10 +2167,10 @@ void CodeGenerator::EmitMoveNextInterpreterLoadDelay()
   Value reg = m_register_cache.AllocateScratch(RegSize_32);
   Value value = m_register_cache.AllocateScratch(RegSize_32);
 
-  const a64::MemOperand load_delay_reg(GetCPUPtrReg(), offsetof(State, load_delay_reg));
-  const a64::MemOperand load_delay_value(GetCPUPtrReg(), offsetof(State, load_delay_value));
-  const a64::MemOperand next_load_delay_reg(GetCPUPtrReg(), offsetof(State, next_load_delay_reg));
-  const a64::MemOperand next_load_delay_value(GetCPUPtrReg(), offsetof(State, next_load_delay_value));
+  const a64::MemOperand load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, load_delay_reg));
+  const a64::MemOperand load_delay_value(GetCPUPtrReg(), OFFSETOF(State, load_delay_value));
+  const a64::MemOperand next_load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, next_load_delay_reg));
+  const a64::MemOperand next_load_delay_value(GetCPUPtrReg(), OFFSETOF(State, next_load_delay_value));
 
   m_emit->Ldrb(GetHostReg32(reg), next_load_delay_reg);
   m_emit->Ldr(GetHostReg32(value), next_load_delay_value);
@@ -2185,7 +2185,7 @@ void CodeGenerator::EmitCancelInterpreterLoadDelayForReg(Reg reg)
   if (!m_load_delay_dirty)
     return;
 
-  const a64::MemOperand load_delay_reg(GetCPUPtrReg(), offsetof(State, load_delay_reg));
+  const a64::MemOperand load_delay_reg(GetCPUPtrReg(), OFFSETOF(State, load_delay_reg));
   Value temp = m_register_cache.AllocateScratch(RegSize_8);
 
   a64::Label skip_cancel;
@@ -2206,7 +2206,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
 {
   if (GetSegmentForAddress(m_pc) >= Segment::KSEG1)
   {
-    EmitAddCPUStructField(offsetof(State, pending_ticks),
+    EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                           Value::FromConstantU32(static_cast<u32>(m_block->uncached_fetch_ticks)));
   }
   else
@@ -2216,7 +2216,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
     const auto& existing_tag_reg = a64::w2;
 
     VirtualMemoryAddress current_pc = m_pc & ICACHE_TAG_ADDRESS_MASK;
-    m_emit->Ldr(ticks_reg, a64::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+    m_emit->Ldr(ticks_reg, a64::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
     m_emit->Mov(current_tag_reg, current_pc);
 
     for (u32 i = 0; i < m_block->icache_line_count; i++, current_pc += ICACHE_LINE_SIZE)
@@ -2226,7 +2226,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
 
       a64::Label cache_hit;
       m_emit->Ldr(existing_tag_reg, a64::MemOperand(GetCPUPtrReg(), offset));
@@ -2241,7 +2241,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
         m_emit->Add(current_tag_reg, current_tag_reg, ICACHE_LINE_SIZE);
     }
 
-    m_emit->Str(ticks_reg, a64::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+    m_emit->Str(ticks_reg, a64::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
   }
 }
 
@@ -2310,9 +2310,9 @@ void CodeGenerator::EmitBlockProtectCheck(const u8* ram_ptr, const u8* shadow_pt
 
 void CodeGenerator::EmitStallUntilGTEComplete()
 {
-  static_assert(offsetof(State, pending_ticks) + sizeof(u32) == offsetof(State, gte_completion_tick));
+  static_assert(OFFSETOF(State, pending_ticks) + sizeof(u32) == OFFSETOF(State, gte_completion_tick));
   m_emit->ldp(GetHostReg32(RARG1), GetHostReg32(RARG2),
-              a64::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+              a64::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
 
   if (m_delayed_cycles_add > 0)
   {
@@ -2322,7 +2322,7 @@ void CodeGenerator::EmitStallUntilGTEComplete()
 
   m_emit->cmp(GetHostReg32(RARG2), GetHostReg32(RARG1));
   m_emit->csel(GetHostReg32(RARG1), GetHostReg32(RARG2), GetHostReg32(RARG1), a64::Condition::hi);
-  m_emit->str(GetHostReg32(RARG1), a64::MemOperand(GetCPUPtrReg(), offsetof(State, pending_ticks)));
+  m_emit->str(GetHostReg32(RARG1), a64::MemOperand(GetCPUPtrReg(), OFFSETOF(State, pending_ticks)));
 }
 
 void CodeGenerator::EmitBranch(const void* address, bool allow_scratch)
diff --git a/src/core/cpu_recompiler_code_generator_generic.cpp b/src/core/cpu_recompiler_code_generator_generic.cpp
index 6c50823f8..b4f997f32 100644
--- a/src/core/cpu_recompiler_code_generator_generic.cpp
+++ b/src/core/cpu_recompiler_code_generator_generic.cpp
@@ -24,8 +24,8 @@ void CodeGenerator::EmitStoreGuestRegister(Reg guest_reg, const Value& value)
 void CodeGenerator::EmitStoreInterpreterLoadDelay(Reg reg, const Value& value)
 {
   DebugAssert(value.size == RegSize_32 && value.IsInHostRegister());
-  EmitStoreCPUStructField(offsetof(State, load_delay_reg), Value::FromConstantU8(static_cast<u8>(reg)));
-  EmitStoreCPUStructField(offsetof(State, load_delay_value), value);
+  EmitStoreCPUStructField(OFFSETOF(State, load_delay_reg), Value::FromConstantU8(static_cast<u8>(reg)));
+  EmitStoreCPUStructField(OFFSETOF(State, load_delay_value), value);
   m_load_delay_dirty = true;
 }
 
@@ -173,10 +173,10 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
 
   if (GetSegmentForAddress(m_pc) >= Segment::KSEG1)
   {
-    EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, offsetof(State, pending_ticks));
+    EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, OFFSETOF(State, pending_ticks));
     EmitAdd(temp.GetHostRegister(), temp.GetHostRegister(),
             Value::FromConstantU32(static_cast<u32>(m_block->uncached_fetch_ticks)), false);
-    EmitStoreCPUStructField(offsetof(State, pending_ticks), temp);
+    EmitStoreCPUStructField(OFFSETOF(State, pending_ticks), temp);
   }
   else
   {
@@ -194,7 +194,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
       LabelType cache_hit;
 
       EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, offset);
@@ -202,11 +202,11 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
       EmitCmp(temp2.GetHostRegister(), temp);
       EmitConditionalBranch(Condition::Equal, false, temp.GetHostRegister(), temp2, &cache_hit);
 
-      EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, offsetof(State, pending_ticks));
+      EmitLoadCPUStructField(temp.GetHostRegister(), RegSize_32, OFFSETOF(State, pending_ticks));
       EmitStoreCPUStructField(offset, temp2);
       EmitAdd(temp.GetHostRegister(), temp.GetHostRegister(), Value::FromConstantU32(static_cast<u32>(fill_ticks)),
               false);
-      EmitStoreCPUStructField(offsetof(State, pending_ticks), temp);
+      EmitStoreCPUStructField(OFFSETOF(State, pending_ticks), temp);
       EmitBindLabel(&cache_hit);
     }
 
@@ -222,8 +222,8 @@ void CodeGenerator::EmitStallUntilGTEComplete()
 {
   Value pending_ticks = m_register_cache.AllocateScratch(RegSize_32);
   Value gte_completion_tick = m_register_cache.AllocateScratch(RegSize_32);
-  EmitLoadCPUStructField(pending_ticks.GetHostRegister(), RegSize_32, offsetof(State, pending_ticks));
-  EmitLoadCPUStructField(gte_completion_tick.GetHostRegister(), RegSize_32, offsetof(State, gte_completion_tick));
+  EmitLoadCPUStructField(pending_ticks.GetHostRegister(), RegSize_32, OFFSETOF(State, pending_ticks));
+  EmitLoadCPUStructField(gte_completion_tick.GetHostRegister(), RegSize_32, OFFSETOF(State, gte_completion_tick));
 
   // commit cycles here, should always be nonzero
   if (m_delayed_cycles_add > 0)
@@ -242,7 +242,7 @@ void CodeGenerator::EmitStallUntilGTEComplete()
 
   // store new ticks
   EmitBindLabel(&gte_done);
-  EmitStoreCPUStructField(offsetof(State, pending_ticks), pending_ticks);
+  EmitStoreCPUStructField(OFFSETOF(State, pending_ticks), pending_ticks);
 }
 
 #endif
diff --git a/src/core/cpu_recompiler_code_generator_x64.cpp b/src/core/cpu_recompiler_code_generator_x64.cpp
index af9bf8360..39374ab5a 100644
--- a/src/core/cpu_recompiler_code_generator_x64.cpp
+++ b/src/core/cpu_recompiler_code_generator_x64.cpp
@@ -509,7 +509,7 @@ void CodeGenerator::EmitBeginBlock(bool allocate_registers /* = true */)
       const bool fastmem_reg_allocated = m_register_cache.AllocateHostReg(RMEMBASEPTR);
       DebugAssert(fastmem_reg_allocated);
       UNREFERENCED_VARIABLE(fastmem_reg_allocated);
-      m_emit->mov(GetFastmemBasePtrReg(), m_emit->qword[GetCPUPtrReg() + offsetof(CPU::State, fastmem_base)]);
+      m_emit->mov(GetFastmemBasePtrReg(), m_emit->qword[GetCPUPtrReg() + OFFSETOF(CPU::State, fastmem_base)]);
     }
   }
 }
@@ -2226,12 +2226,12 @@ void CodeGenerator::EmitLoadGuestMemoryFastmem(Instruction instruction, const Co
 
   // we add the ticks *after* the add here, since we counted incorrectly, then correct for it below
   DebugAssert(m_delayed_cycles_add > 0);
-  EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
   m_delayed_cycles_add += Bus::RAM_READ_TICKS;
 
   EmitLoadGuestMemorySlowmem(instruction, info, address, size, result, true);
 
-  EmitAddCPUStructField(offsetof(State, pending_ticks),
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                         Value::FromConstantU32(static_cast<u32>(-m_delayed_cycles_add)));
 
   // return to the block code
@@ -2422,11 +2422,11 @@ void CodeGenerator::EmitStoreGuestMemoryFastmem(Instruction instruction, const C
   SwitchToFarCode();
 
   DebugAssert(m_delayed_cycles_add > 0);
-  EmitAddCPUStructField(offsetof(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks), Value::FromConstantU32(static_cast<u32>(m_delayed_cycles_add)));
 
   EmitStoreGuestMemorySlowmem(instruction, info, address, size, value, true);
 
-  EmitAddCPUStructField(offsetof(State, pending_ticks),
+  EmitAddCPUStructField(OFFSETOF(State, pending_ticks),
                         Value::FromConstantU32(static_cast<u32>(-m_delayed_cycles_add)));
 
   // return to the block code
@@ -2513,7 +2513,7 @@ void CodeGenerator::EmitStoreGuestMemorySlowmem(Instruction instruction, const C
 
 void CodeGenerator::EmitUpdateFastmemBase()
 {
-  m_emit->mov(GetFastmemBasePtrReg(), m_emit->qword[GetCPUPtrReg() + offsetof(CPU::State, fastmem_base)]);
+  m_emit->mov(GetFastmemBasePtrReg(), m_emit->qword[GetCPUPtrReg() + OFFSETOF(CPU::State, fastmem_base)]);
 }
 
 void CodeGenerator::BackpatchLoadStore(void* host_pc, const CodeCache::LoadstoreBackpatchInfo& lbi)
@@ -2732,9 +2732,9 @@ void CodeGenerator::EmitFlushInterpreterLoadDelay()
   Value reg = m_register_cache.AllocateScratch(RegSize_8);
   Value value = m_register_cache.AllocateScratch(RegSize_32);
 
-  auto load_delay_reg = m_emit->byte[GetCPUPtrReg() + offsetof(State, load_delay_reg)];
-  auto load_delay_value = m_emit->dword[GetCPUPtrReg() + offsetof(State, load_delay_value)];
-  auto reg_ptr = m_emit->dword[GetCPUPtrReg() + offsetof(State, regs.r[0]) + GetHostReg64(reg.host_reg) * 4];
+  auto load_delay_reg = m_emit->byte[GetCPUPtrReg() + OFFSETOF(State, load_delay_reg)];
+  auto load_delay_value = m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, load_delay_value)];
+  auto reg_ptr = m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, regs.r[0]) + GetHostReg64(reg.host_reg) * 4];
 
   Xbyak::Label skip_flush;
 
@@ -2760,10 +2760,10 @@ void CodeGenerator::EmitMoveNextInterpreterLoadDelay()
   Value reg = m_register_cache.AllocateScratch(RegSize_8);
   Value value = m_register_cache.AllocateScratch(RegSize_32);
 
-  auto load_delay_reg = m_emit->byte[GetCPUPtrReg() + offsetof(State, load_delay_reg)];
-  auto load_delay_value = m_emit->dword[GetCPUPtrReg() + offsetof(State, load_delay_value)];
-  auto next_load_delay_reg = m_emit->byte[GetCPUPtrReg() + offsetof(State, next_load_delay_reg)];
-  auto next_load_delay_value = m_emit->dword[GetCPUPtrReg() + offsetof(State, next_load_delay_value)];
+  auto load_delay_reg = m_emit->byte[GetCPUPtrReg() + OFFSETOF(State, load_delay_reg)];
+  auto load_delay_value = m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, load_delay_value)];
+  auto next_load_delay_reg = m_emit->byte[GetCPUPtrReg() + OFFSETOF(State, next_load_delay_reg)];
+  auto next_load_delay_value = m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, next_load_delay_value)];
 
   m_emit->mov(GetHostReg32(value), next_load_delay_value);
   m_emit->mov(GetHostReg8(reg), next_load_delay_reg);
@@ -2777,7 +2777,7 @@ void CodeGenerator::EmitCancelInterpreterLoadDelayForReg(Reg reg)
   if (!m_load_delay_dirty)
     return;
 
-  auto load_delay_reg = m_emit->byte[GetCPUPtrReg() + offsetof(State, load_delay_reg)];
+  auto load_delay_reg = m_emit->byte[GetCPUPtrReg() + OFFSETOF(State, load_delay_reg)];
 
   Xbyak::Label skip_cancel;
 
@@ -2795,7 +2795,7 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
 {
   if (GetSegmentForAddress(m_pc) >= Segment::KSEG1)
   {
-    m_emit->add(m_emit->dword[GetCPUPtrReg() + offsetof(State, pending_ticks)],
+    m_emit->add(m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, pending_ticks)],
                 static_cast<u32>(m_block->uncached_fetch_ticks));
   }
   else
@@ -2809,13 +2809,13 @@ void CodeGenerator::EmitICacheCheckAndUpdate()
         continue;
 
       const u32 line = GetICacheLine(current_pc);
-      const u32 offset = offsetof(State, icache_tags) + (line * sizeof(u32));
+      const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
       Xbyak::Label cache_hit;
 
       m_emit->cmp(m_emit->dword[GetCPUPtrReg() + offset], tag);
       m_emit->je(cache_hit);
       m_emit->mov(m_emit->dword[GetCPUPtrReg() + offset], tag);
-      m_emit->add(m_emit->dword[GetCPUPtrReg() + offsetof(State, pending_ticks)], static_cast<u32>(fill_ticks));
+      m_emit->add(m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, pending_ticks)], static_cast<u32>(fill_ticks));
       m_emit->L(cache_hit);
     }
   }
@@ -2879,8 +2879,8 @@ void CodeGenerator::EmitBlockProtectCheck(const u8* ram_ptr, const u8* shadow_pt
 
 void CodeGenerator::EmitStallUntilGTEComplete()
 {
-  m_emit->mov(GetHostReg32(RRETURN), m_emit->dword[GetCPUPtrReg() + offsetof(State, pending_ticks)]);
-  m_emit->mov(GetHostReg32(RARG1), m_emit->dword[GetCPUPtrReg() + offsetof(State, gte_completion_tick)]);
+  m_emit->mov(GetHostReg32(RRETURN), m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, pending_ticks)]);
+  m_emit->mov(GetHostReg32(RARG1), m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, gte_completion_tick)]);
 
   if (m_delayed_cycles_add > 0)
   {
@@ -2890,7 +2890,7 @@ void CodeGenerator::EmitStallUntilGTEComplete()
 
   m_emit->cmp(GetHostReg32(RARG1), GetHostReg32(RRETURN));
   m_emit->cmova(GetHostReg32(RRETURN), GetHostReg32(RARG1));
-  m_emit->mov(m_emit->dword[GetCPUPtrReg() + offsetof(State, pending_ticks)], GetHostReg32(RRETURN));
+  m_emit->mov(m_emit->dword[GetCPUPtrReg() + OFFSETOF(State, pending_ticks)], GetHostReg32(RRETURN));
 }
 
 void CodeGenerator::EmitBranch(const void* address, bool allow_scratch)
diff --git a/src/core/gpu_hw.cpp b/src/core/gpu_hw.cpp
index 38356f5ef..c96f662f6 100644
--- a/src/core/gpu_hw.cpp
+++ b/src/core/gpu_hw.cpp
@@ -838,15 +838,15 @@ bool GPU_HW::CompilePipelines()
 
   static constexpr GPUPipeline::VertexAttribute vertex_attributes[] = {
     GPUPipeline::VertexAttribute::Make(0, GPUPipeline::VertexAttribute::Semantic::Position, 0,
-                                       GPUPipeline::VertexAttribute::Type::Float, 4, offsetof(BatchVertex, x)),
+                                       GPUPipeline::VertexAttribute::Type::Float, 4, OFFSETOF(BatchVertex, x)),
     GPUPipeline::VertexAttribute::Make(1, GPUPipeline::VertexAttribute::Semantic::Color, 0,
-                                       GPUPipeline::VertexAttribute::Type::UNorm8, 4, offsetof(BatchVertex, color)),
+                                       GPUPipeline::VertexAttribute::Type::UNorm8, 4, OFFSETOF(BatchVertex, color)),
     GPUPipeline::VertexAttribute::Make(2, GPUPipeline::VertexAttribute::Semantic::TexCoord, 0,
-                                       GPUPipeline::VertexAttribute::Type::UInt32, 1, offsetof(BatchVertex, u)),
+                                       GPUPipeline::VertexAttribute::Type::UInt32, 1, OFFSETOF(BatchVertex, u)),
     GPUPipeline::VertexAttribute::Make(3, GPUPipeline::VertexAttribute::Semantic::TexCoord, 1,
-                                       GPUPipeline::VertexAttribute::Type::UInt32, 1, offsetof(BatchVertex, texpage)),
+                                       GPUPipeline::VertexAttribute::Type::UInt32, 1, OFFSETOF(BatchVertex, texpage)),
     GPUPipeline::VertexAttribute::Make(4, GPUPipeline::VertexAttribute::Semantic::TexCoord, 2,
-                                       GPUPipeline::VertexAttribute::Type::UNorm8, 4, offsetof(BatchVertex, uv_limits)),
+                                       GPUPipeline::VertexAttribute::Type::UNorm8, 4, OFFSETOF(BatchVertex, uv_limits)),
   };
   static constexpr u32 NUM_BATCH_VERTEX_ATTRIBUTES = 2;
   static constexpr u32 NUM_BATCH_TEXTURED_VERTEX_ATTRIBUTES = 4;
diff --git a/src/util/cd_image_device.cpp b/src/util/cd_image_device.cpp
index abe58577b..9d7a5944d 100644
--- a/src/util/cd_image_device.cpp
+++ b/src/util/cd_image_device.cpp
@@ -473,7 +473,7 @@ std::optional<u32> CDImageDeviceWin32::DoSCSICommand(u8 cmd[SCSI_CMD_LENGTH], st
   sptd.cmd.DataIn = out_buffer.empty() ? SCSI_IOCTL_DATA_UNSPECIFIED : SCSI_IOCTL_DATA_IN;
   sptd.cmd.DataTransferLength = static_cast<u32>(out_buffer.size());
   sptd.cmd.TimeOutValue = 10;
-  sptd.cmd.SenseInfoOffset = offsetof(SPTDBuffer, sense);
+  sptd.cmd.SenseInfoOffset = OFFSETOF(SPTDBuffer, sense);
   sptd.cmd.DataBuffer = out_buffer.empty() ? nullptr : out_buffer.data();
   std::memcpy(sptd.cmd.Cdb, cmd, SCSI_CMD_LENGTH);
 
diff --git a/src/util/dinput_source.cpp b/src/util/dinput_source.cpp
index 52256ff3e..d49053151 100644
--- a/src/util/dinput_source.cpp
+++ b/src/util/dinput_source.cpp
@@ -207,10 +207,10 @@ bool DInputSource::AddDevice(ControllerData& cd, const std::string& name)
 
   cd.num_buttons = caps.dwButtons;
 
-  static constexpr const u32 axis_offsets[] = {offsetof(DIJOYSTATE, lX),           offsetof(DIJOYSTATE, lY),
-                                               offsetof(DIJOYSTATE, lZ),           offsetof(DIJOYSTATE, lRz),
-                                               offsetof(DIJOYSTATE, lRx),          offsetof(DIJOYSTATE, lRy),
-                                               offsetof(DIJOYSTATE, rglSlider[0]), offsetof(DIJOYSTATE, rglSlider[1])};
+  static constexpr const u32 axis_offsets[] = {OFFSETOF(DIJOYSTATE, lX),           OFFSETOF(DIJOYSTATE, lY),
+                                               OFFSETOF(DIJOYSTATE, lZ),           OFFSETOF(DIJOYSTATE, lRz),
+                                               OFFSETOF(DIJOYSTATE, lRx),          OFFSETOF(DIJOYSTATE, lRy),
+                                               OFFSETOF(DIJOYSTATE, rglSlider[0]), OFFSETOF(DIJOYSTATE, rglSlider[1])};
   for (const u32 offset : axis_offsets)
   {
     // ask for 16 bits of axis range
diff --git a/src/util/gpu_device.cpp b/src/util/gpu_device.cpp
index c6750c6b0..832ad4389 100644
--- a/src/util/gpu_device.cpp
+++ b/src/util/gpu_device.cpp
@@ -472,11 +472,11 @@ bool GPUDevice::CreateResources()
 
   static constexpr GPUPipeline::VertexAttribute imgui_attributes[] = {
     GPUPipeline::VertexAttribute::Make(0, GPUPipeline::VertexAttribute::Semantic::Position, 0,
-                                       GPUPipeline::VertexAttribute::Type::Float, 2, offsetof(ImDrawVert, pos)),
+                                       GPUPipeline::VertexAttribute::Type::Float, 2, OFFSETOF(ImDrawVert, pos)),
     GPUPipeline::VertexAttribute::Make(1, GPUPipeline::VertexAttribute::Semantic::TexCoord, 0,
-                                       GPUPipeline::VertexAttribute::Type::Float, 2, offsetof(ImDrawVert, uv)),
+                                       GPUPipeline::VertexAttribute::Type::Float, 2, OFFSETOF(ImDrawVert, uv)),
     GPUPipeline::VertexAttribute::Make(2, GPUPipeline::VertexAttribute::Semantic::Color, 0,
-                                       GPUPipeline::VertexAttribute::Type::UNorm8, 4, offsetof(ImDrawVert, col)),
+                                       GPUPipeline::VertexAttribute::Type::UNorm8, 4, OFFSETOF(ImDrawVert, col)),
   };
 
   GPUPipeline::GraphicsConfig plconfig;