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CPU/PGXP: Use bit math for flags instead of union
This commit is contained in:
parent
82f3e17b78
commit
29d4e04e3b
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@ -56,12 +56,14 @@ struct PGXP_value
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float y;
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float y;
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float z;
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float z;
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u32 value;
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u32 value;
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union
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u32 flags;
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ALWAYS_INLINE void SetValidComp(u32 comp, bool valid)
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{
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{
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u32 flags;
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flags = (flags & ~(1u << comp)) | (static_cast<u32>(valid) << comp);
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u8 compFlags[4];
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}
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u16 halfFlags[2];
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};
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ALWAYS_INLINE bool GetValidComp(u32 comp) const { return ConvertToBoolUnchecked((flags >> comp) & 1); }
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};
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};
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struct State
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struct State
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@ -32,16 +32,13 @@ enum : u32
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PGXP_MEM_SCRATCH_OFFSET = Bus::RAM_8MB_SIZE / 4
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PGXP_MEM_SCRATCH_OFFSET = Bus::RAM_8MB_SIZE / 4
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};
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};
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#define NONE 0
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#define ALL 0xFFFFFFFF
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#define ALL 0xFFFFFFFF
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#define VALID 1
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#define VALID_0 (1 << 0)
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#define VALID_0 (VALID << 0)
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#define VALID_1 (1 << 1)
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#define VALID_1 (VALID << 8)
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#define VALID_2 (1 << 2)
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#define VALID_2 (VALID << 16)
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#define VALID_3 (VALID << 24)
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#define VALID_01 (VALID_0 | VALID_1)
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#define VALID_01 (VALID_0 | VALID_1)
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#define VALID_012 (VALID_0 | VALID_1 | VALID_2)
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#define VALID_012 (VALID_0 | VALID_1 | VALID_2)
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#define VALID_ALL (VALID_0 | VALID_1 | VALID_2 | VALID_3)
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#define VALID_ALL (VALID_0 | VALID_1 | VALID_2)
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#define INV_VALID_ALL (ALL ^ VALID_ALL)
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#define INV_VALID_ALL (ALL ^ VALID_ALL)
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union psx_value
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union psx_value
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@ -85,6 +82,9 @@ static void CPU_BITWISE(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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static void WriteMem(const PGXP_value* value, u32 addr);
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static void WriteMem(const PGXP_value* value, u32 addr);
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static void WriteMem16(const PGXP_value* src, u32 addr);
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static void WriteMem16(const PGXP_value* src, u32 addr);
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static void CopyZIfMissing(PGXP_value& dst, const PGXP_value& src);
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static void SelectZ(PGXP_value& dst, const PGXP_value& src1, const PGXP_value& src2);
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#ifdef LOG_VALUES
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#ifdef LOG_VALUES
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static void LogInstruction(u32 pc, u32 instr);
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static void LogInstruction(u32 pc, u32 instr);
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static void LogValue(const char* name, u32 rval, const PGXP_value* val);
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static void LogValue(const char* name, u32 rval, const PGXP_value* val);
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@ -107,8 +107,8 @@ static void LogValueStr(SmallStringBase& str, const char* name, u32 rval, const
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#endif
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#endif
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// clang-format on
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// clang-format on
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static const PGXP_value PGXP_value_invalid = {0.f, 0.f, 0.f, 0, {0}};
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static const PGXP_value PGXP_value_invalid = {0.f, 0.f, 0.f, 0, 0};
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static const PGXP_value PGXP_value_zero = {0.f, 0.f, 0.f, 0, {VALID_ALL}};
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static const PGXP_value PGXP_value_zero = {0.f, 0.f, 0.f, 0, VALID_ALL};
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static PGXP_value* s_mem = nullptr;
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static PGXP_value* s_mem = nullptr;
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static PGXP_value* s_vertex_cache = nullptr;
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static PGXP_value* s_vertex_cache = nullptr;
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@ -303,19 +303,19 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::ValidateAndCopyMem16(PGXP_value* dest, u32
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if (hiword)
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if (hiword)
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{
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{
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dest->x = dest->y;
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dest->x = dest->y;
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dest->compFlags[0] = dest->compFlags[1];
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dest->SetValidComp(0, dest->GetValidComp(1));
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}
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}
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// only set y as valid if x is also valid.. don't want to make fake values
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// only set y as valid if x is also valid.. don't want to make fake values
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if (dest->compFlags[0] == VALID)
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if (dest->GetValidComp(0))
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{
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{
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dest->y = (dest->x < 0) ? -1.f * sign : 0.f;
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dest->y = (dest->x < 0) ? -1.f * sign : 0.f;
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dest->compFlags[1] = VALID;
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dest->SetValidComp(1, true);
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}
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}
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else
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else
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{
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{
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dest->y = 0.0f;
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dest->y = 0.0f;
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dest->compFlags[1] = 0;
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dest->SetValidComp(1, false);
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}
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}
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dest->value = value;
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dest->value = value;
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@ -340,24 +340,39 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::WriteMem16(const PGXP_value* src, u32 addr
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if (hiword)
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if (hiword)
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{
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{
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dest->y = src->x;
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dest->y = src->x;
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dest->compFlags[1] = src->compFlags[0];
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dest->SetValidComp(1, src->GetValidComp(0));
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dest->value = (dest->value & UINT32_C(0x0000FFFF)) | (src->value << 16);
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dest->value = (dest->value & UINT32_C(0x0000FFFF)) | (src->value << 16);
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}
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}
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else
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else
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{
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{
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dest->x = src->x;
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dest->x = src->x;
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dest->compFlags[0] = src->compFlags[0];
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dest->SetValidComp(0, src->GetValidComp(0));
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dest->value = (dest->value & UINT32_C(0xFFFF0000)) | (src->value & UINT32_C(0x0000FFFF));
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dest->value = (dest->value & UINT32_C(0xFFFF0000)) | (src->value & UINT32_C(0x0000FFFF));
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}
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}
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// overwrite z/w if valid
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// overwrite z/w if valid
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if (src->compFlags[2] == VALID)
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if (src->GetValidComp(2))
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{
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{
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dest->z = src->z;
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dest->z = src->z;
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dest->compFlags[2] = src->compFlags[2];
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dest->SetValidComp(2, true);
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}
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}
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}
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}
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ALWAYS_INLINE_RELEASE void CPU::PGXP::CopyZIfMissing(PGXP_value& dst, const PGXP_value& src)
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{
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if (dst.GetValidComp(2))
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return;
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dst.z = src.z;
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dst.flags |= (src.flags & VALID_2);
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}
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ALWAYS_INLINE_RELEASE void CPU::PGXP::SelectZ(PGXP_value& dst, const PGXP_value& src1, const PGXP_value& src2)
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{
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dst.z = src1.GetValidComp(2) ? src1.z : src2.z;
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dst.flags |= ((src1.flags | src2.flags) & VALID_2);
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}
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#ifdef LOG_VALUES
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#ifdef LOG_VALUES
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void CPU::PGXP::LogInstruction(u32 pc, u32 instr)
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void CPU::PGXP::LogInstruction(u32 pc, u32 instr)
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{
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{
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@ -929,13 +944,13 @@ void CPU::PGXP::CPU_ADD(u32 instr, u32 rsVal, u32 rtVal)
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// TODO: decide which "z/w" component to use
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// TODO: decide which "z/w" component to use
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ret.halfFlags[0] &= g_state.pgxp_gpr[rt(instr)].halfFlags[0];
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ret.flags &= (g_state.pgxp_gpr[rt(instr)].flags & VALID_01);
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}
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}
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if (!(ret.flags & VALID_2) && (g_state.pgxp_gpr[rt(instr)].flags & VALID_2))
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if (!(ret.flags & VALID_2) && (g_state.pgxp_gpr[rt(instr)].flags & VALID_2))
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{
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{
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ret.z = g_state.pgxp_gpr[rt(instr)].z;
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ret.z = g_state.pgxp_gpr[rt(instr)].z;
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ret.flags |= VALID_2;
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ret.SetValidComp(2, true);
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}
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}
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ret.value = rsVal + rtVal;
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ret.value = rsVal + rtVal;
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@ -974,7 +989,7 @@ void CPU::PGXP::CPU_SUB(u32 instr, u32 rsVal, u32 rtVal)
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// truncate on overflow/underflow
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// truncate on overflow/underflow
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ret.y += (ret.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (ret.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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ret.y += (ret.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (ret.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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ret.halfFlags[0] &= g_state.pgxp_gpr[rt(instr)].halfFlags[0];
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ret.flags &= (g_state.pgxp_gpr[rt(instr)].flags & VALID_01);
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ret.value = rsVal - rtVal;
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ret.value = rsVal - rtVal;
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@ -1020,17 +1035,17 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::CPU_BITWISE(u32 instr, u32 rdVal, u32 rsVa
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else if (vald.w.l == vals.w.l)
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else if (vald.w.l == vals.w.l)
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{
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{
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ret.x = g_state.pgxp_gpr[rs(instr)].x;
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ret.x = g_state.pgxp_gpr[rs(instr)].x;
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ret.compFlags[0] = g_state.pgxp_gpr[rs(instr)].compFlags[0];
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ret.SetValidComp(0, g_state.pgxp_gpr[rs(instr)].GetValidComp(0));
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}
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}
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else if (vald.w.l == valt.w.l)
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else if (vald.w.l == valt.w.l)
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{
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{
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ret.x = g_state.pgxp_gpr[rt(instr)].x;
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ret.x = g_state.pgxp_gpr[rt(instr)].x;
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ret.compFlags[0] = g_state.pgxp_gpr[rt(instr)].compFlags[0];
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ret.SetValidComp(0, g_state.pgxp_gpr[rt(instr)].GetValidComp(0));
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}
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}
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else
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else
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{
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{
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ret.x = (float)vald.sw.l;
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ret.x = (float)vald.sw.l;
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ret.compFlags[0] = VALID;
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ret.SetValidComp(0, true);
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}
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}
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if (vald.w.h == 0)
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if (vald.w.h == 0)
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@ -1040,17 +1055,17 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::CPU_BITWISE(u32 instr, u32 rdVal, u32 rsVa
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else if (vald.w.h == vals.w.h)
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else if (vald.w.h == vals.w.h)
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{
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{
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ret.y = g_state.pgxp_gpr[rs(instr)].y;
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ret.y = g_state.pgxp_gpr[rs(instr)].y;
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ret.compFlags[1] &= g_state.pgxp_gpr[rs(instr)].compFlags[1];
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ret.SetValidComp(1, g_state.pgxp_gpr[rs(instr)].GetValidComp(1));
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}
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}
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else if (vald.w.h == valt.w.h)
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else if (vald.w.h == valt.w.h)
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{
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{
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ret.y = g_state.pgxp_gpr[rt(instr)].y;
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ret.y = g_state.pgxp_gpr[rt(instr)].y;
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ret.compFlags[1] &= g_state.pgxp_gpr[rt(instr)].compFlags[1];
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ret.SetValidComp(1, g_state.pgxp_gpr[rt(instr)].GetValidComp(1));
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}
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}
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else
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else
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{
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{
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ret.y = (float)vald.sw.h;
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ret.y = (float)vald.sw.h;
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ret.compFlags[1] = VALID;
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ret.SetValidComp(1, true);
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}
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}
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// iCB Hack: Force validity if even one half is valid
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// iCB Hack: Force validity if even one half is valid
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@ -1059,20 +1074,20 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::CPU_BITWISE(u32 instr, u32 rdVal, u32 rsVa
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// /iCB Hack
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// /iCB Hack
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// Get a valid W
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// Get a valid W
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if ((g_state.pgxp_gpr[rs(instr)].flags & VALID_2) == VALID_2)
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if (g_state.pgxp_gpr[rs(instr)].GetValidComp(2))
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{
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{
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ret.z = g_state.pgxp_gpr[rs(instr)].z;
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ret.z = g_state.pgxp_gpr[rs(instr)].z;
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ret.compFlags[2] = g_state.pgxp_gpr[rs(instr)].compFlags[2];
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ret.SetValidComp(2, true);
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}
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}
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else if ((g_state.pgxp_gpr[rt(instr)].flags & VALID_2) == VALID_2)
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else if (g_state.pgxp_gpr[rt(instr)].GetValidComp(2))
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{
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{
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ret.z = g_state.pgxp_gpr[rt(instr)].z;
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ret.z = g_state.pgxp_gpr[rt(instr)].z;
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ret.compFlags[2] = g_state.pgxp_gpr[rt(instr)].compFlags[2];
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ret.SetValidComp(2, true);
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}
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}
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else
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else
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{
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{
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ret.z = 0.0f;
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ret.z = 0.0f;
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ret.compFlags[2] = 0;
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ret.SetValidComp(2, false);
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}
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}
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ret.value = rdVal;
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ret.value = rdVal;
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@ -1134,7 +1149,7 @@ void CPU::PGXP::CPU_SLT(u32 instr, u32 rsVal, u32 rtVal)
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ret = g_state.pgxp_gpr[rs(instr)];
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ret = g_state.pgxp_gpr[rs(instr)];
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ret.y = 0.f;
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ret.y = 0.f;
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ret.compFlags[1] = VALID;
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ret.SetValidComp(1, true);
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ret.x = (g_state.pgxp_gpr[rs(instr)].y < g_state.pgxp_gpr[rt(instr)].y) ? 1.f :
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ret.x = (g_state.pgxp_gpr[rs(instr)].y < g_state.pgxp_gpr[rt(instr)].y) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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@ -1163,7 +1178,7 @@ void CPU::PGXP::CPU_SLTU(u32 instr, u32 rsVal, u32 rtVal)
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ret = g_state.pgxp_gpr[rs(instr)];
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ret = g_state.pgxp_gpr[rs(instr)];
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ret.y = 0.f;
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ret.y = 0.f;
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ret.compFlags[1] = VALID;
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ret.SetValidComp(1, true);
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ret.x = (f16Unsign(g_state.pgxp_gpr[rs(instr)].y) < f16Unsign(g_state.pgxp_gpr[rt(instr)].y)) ? 1.f :
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ret.x = (f16Unsign(g_state.pgxp_gpr[rs(instr)].y) < f16Unsign(g_state.pgxp_gpr[rt(instr)].y)) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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@ -1193,10 +1208,11 @@ void CPU::PGXP::CPU_MULT(u32 instr, u32 rsVal, u32 rtVal)
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MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
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MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
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}
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}
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[rs(instr)];
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[rs(instr)];
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CopyZIfMissing(g_state.pgxp_gpr[static_cast<u8>(Reg::lo)], g_state.pgxp_gpr[rs(instr)]);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].halfFlags[0] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].halfFlags[0] =
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// Z/valid is the same
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(g_state.pgxp_gpr[rs(instr)].halfFlags[0] & g_state.pgxp_gpr[rt(instr)].halfFlags[0]);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[static_cast<u8>(Reg::lo)];
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double xx, xy, yx, yy;
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double xx, xy, yx, yy;
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double lx = 0, ly = 0, hx = 0, hy = 0;
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double lx = 0, ly = 0, hx = 0, hy = 0;
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@ -1245,10 +1261,11 @@ void CPU::PGXP::CPU_MULTU(u32 instr, u32 rsVal, u32 rtVal)
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MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
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MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
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}
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}
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[rs(instr)];
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[rs(instr)];
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CopyZIfMissing(g_state.pgxp_gpr[static_cast<u8>(Reg::lo)], g_state.pgxp_gpr[rs(instr)]);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].halfFlags[0] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].halfFlags[0] =
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// Z/valid is the same
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(g_state.pgxp_gpr[rs(instr)].halfFlags[0] & g_state.pgxp_gpr[rt(instr)].halfFlags[0]);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[static_cast<u8>(Reg::lo)];
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double xx, xy, yx, yy;
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double xx, xy, yx, yy;
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double lx = 0, ly = 0, hx = 0, hy = 0;
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double lx = 0, ly = 0, hx = 0, hy = 0;
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@ -1298,10 +1315,11 @@ void CPU::PGXP::CPU_DIV(u32 instr, u32 rsVal, u32 rtVal)
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||||||
MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
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MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
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||||||
}
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}
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||||||
|
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||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[rs(instr)];
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[rs(instr)];
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||||||
|
CopyZIfMissing(g_state.pgxp_gpr[static_cast<u8>(Reg::lo)], g_state.pgxp_gpr[rs(instr)]);
|
||||||
|
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].halfFlags[0] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].halfFlags[0] =
|
// Z/valid is the same
|
||||||
(g_state.pgxp_gpr[rs(instr)].halfFlags[0] & g_state.pgxp_gpr[rt(instr)].halfFlags[0]);
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[static_cast<u8>(Reg::lo)];
|
||||||
|
|
||||||
double vs = f16Unsign(g_state.pgxp_gpr[rs(instr)].x) + (g_state.pgxp_gpr[rs(instr)].y) * (double)(1 << 16);
|
double vs = f16Unsign(g_state.pgxp_gpr[rs(instr)].x) + (g_state.pgxp_gpr[rs(instr)].y) * (double)(1 << 16);
|
||||||
double vt = f16Unsign(g_state.pgxp_gpr[rt(instr)].x) + (g_state.pgxp_gpr[rt(instr)].y) * (double)(1 << 16);
|
double vt = f16Unsign(g_state.pgxp_gpr[rt(instr)].x) + (g_state.pgxp_gpr[rt(instr)].y) * (double)(1 << 16);
|
||||||
|
@ -1354,10 +1372,11 @@ void CPU::PGXP::CPU_DIVU(u32 instr, u32 rsVal, u32 rtVal)
|
||||||
MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
|
MakeValid(&g_state.pgxp_gpr[rt(instr)], rtVal);
|
||||||
}
|
}
|
||||||
|
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[rs(instr)];
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)] = g_state.pgxp_gpr[rs(instr)];
|
||||||
|
CopyZIfMissing(g_state.pgxp_gpr[static_cast<u8>(Reg::lo)], g_state.pgxp_gpr[rs(instr)]);
|
||||||
|
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].halfFlags[0] = g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].halfFlags[0] =
|
// Z/valid is the same
|
||||||
(g_state.pgxp_gpr[rs(instr)].halfFlags[0] & g_state.pgxp_gpr[rt(instr)].halfFlags[0]);
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)] = g_state.pgxp_gpr[static_cast<u8>(Reg::lo)];
|
||||||
|
|
||||||
double vs = f16Unsign(g_state.pgxp_gpr[rs(instr)].x) + f16Unsign(g_state.pgxp_gpr[rs(instr)].y) * (double)(1 << 16);
|
double vs = f16Unsign(g_state.pgxp_gpr[rs(instr)].x) + f16Unsign(g_state.pgxp_gpr[rs(instr)].y) * (double)(1 << 16);
|
||||||
double vt = f16Unsign(g_state.pgxp_gpr[rt(instr)].x) + f16Unsign(g_state.pgxp_gpr[rt(instr)].y) * (double)(1 << 16);
|
double vt = f16Unsign(g_state.pgxp_gpr[rt(instr)].x) + f16Unsign(g_state.pgxp_gpr[rt(instr)].y) * (double)(1 << 16);
|
||||||
|
|
Loading…
Reference in a new issue