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https://github.com/RetroDECK/Duckstation.git
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CPU: Inhibit debug dispatcher when COP0 BP is invalid
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cf760bbe42
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32f5482ad2
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@ -41,6 +41,7 @@ static u32 ReadCop0Reg(Cop0Reg reg);
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static void WriteCop0Reg(Cop0Reg reg, u32 value);
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static void DispatchCop0Breakpoint();
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static bool IsCop0ExecutionBreakpointUnmasked();
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static void Cop0ExecutionBreakpointCheck();
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template<MemoryAccessType type>
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static void Cop0DataBreakpointCheck(VirtualMemoryAddress address);
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@ -108,7 +109,8 @@ void CPU::StartTrace()
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return;
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s_trace_to_log = true;
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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}
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void CPU::StopTrace()
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@ -121,7 +123,8 @@ void CPU::StopTrace()
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s_log_file_opened = false;
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s_trace_to_log = false;
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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}
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void CPU::WriteToExecutionLog(const char* format, ...)
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@ -517,6 +520,8 @@ ALWAYS_INLINE_RELEASE void CPU::WriteCop0Reg(Cop0Reg reg, u32 value)
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{
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g_state.cop0_regs.BPCM = value;
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Log_DevPrintf("COP0 BPCM <- %08X", value);
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if (UpdateDebugDispatcherFlag())
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ExitExecution();
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}
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break;
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@ -545,7 +550,8 @@ ALWAYS_INLINE_RELEASE void CPU::WriteCop0Reg(Cop0Reg reg, u32 value)
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g_state.cop0_regs.dcic.bits =
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(g_state.cop0_regs.dcic.bits & ~Cop0Registers::DCIC::WRITE_MASK) | (value & Cop0Registers::DCIC::WRITE_MASK);
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Log_DevPrintf("COP0 DCIC <- %08X (now %08X)", value, g_state.cop0_regs.dcic.bits);
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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ExitExecution();
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}
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break;
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@ -574,6 +580,34 @@ ALWAYS_INLINE_RELEASE void CPU::WriteCop0Reg(Cop0Reg reg, u32 value)
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}
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}
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ALWAYS_INLINE_RELEASE bool CPU::IsCop0ExecutionBreakpointUnmasked()
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{
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static constexpr const u32 code_address_ranges[][2] = {
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// KUSEG
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{Bus::RAM_BASE, Bus::RAM_BASE | Bus::RAM_8MB_MASK},
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{Bus::BIOS_BASE, Bus::BIOS_BASE | Bus::BIOS_MASK},
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// KSEG0
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{0x80000000u | Bus::RAM_BASE, 0x80000000u | Bus::RAM_BASE | Bus::RAM_8MB_MASK},
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{0x80000000u | Bus::BIOS_BASE, 0x80000000u | Bus::BIOS_BASE | Bus::BIOS_MASK},
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// KSEG1
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{0xA0000000u | Bus::RAM_BASE, 0xA0000000u | Bus::RAM_BASE | Bus::RAM_8MB_MASK},
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{0xA0000000u | Bus::BIOS_BASE, 0xA0000000u | Bus::BIOS_BASE | Bus::BIOS_MASK},
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};
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const u32 bpc = g_state.cop0_regs.BPC;
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const u32 bpcm = g_state.cop0_regs.BPCM;
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const u32 masked_bpc = bpc & bpcm;
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for (const auto [range_start, range_end] : code_address_ranges)
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{
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if (masked_bpc >= (range_start & bpcm) && masked_bpc <= (range_end & bpcm))
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return true;
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}
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return false;
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}
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ALWAYS_INLINE_RELEASE void CPU::Cop0ExecutionBreakpointCheck()
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{
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if (!g_state.cop0_regs.dcic.ExecutionBreakpointsEnabled())
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@ -1890,25 +1924,24 @@ void CPU::DispatchInterrupt()
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TimingEvents::UpdateCPUDowncount();
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}
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void CPU::UpdateDebugDispatcherFlag()
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bool CPU::UpdateDebugDispatcherFlag()
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{
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const bool has_any_breakpoints = !s_breakpoints.empty();
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// TODO: cop0 breakpoints
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const auto& dcic = g_state.cop0_regs.dcic;
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const bool has_cop0_breakpoints =
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dcic.super_master_enable_1 && dcic.super_master_enable_2 && dcic.execution_breakpoint_enable;
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const bool has_cop0_breakpoints = dcic.super_master_enable_1 && dcic.super_master_enable_2 &&
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dcic.execution_breakpoint_enable && IsCop0ExecutionBreakpointUnmasked();
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const bool use_debug_dispatcher =
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has_any_breakpoints || has_cop0_breakpoints || s_trace_to_log ||
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(g_settings.cpu_execution_mode == CPUExecutionMode::Interpreter && g_settings.bios_tty_logging);
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if (use_debug_dispatcher == g_state.use_debug_dispatcher)
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return;
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return false;
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Log_DevPrintf("%s debug dispatcher", use_debug_dispatcher ? "Now using" : "No longer using");
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g_state.use_debug_dispatcher = use_debug_dispatcher;
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if (System::IsExecuting())
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ExitExecution();
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return true;
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}
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void CPU::ExitExecution()
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@ -1963,7 +1996,8 @@ bool CPU::AddBreakpoint(VirtualMemoryAddress address, bool auto_clear, bool enab
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Breakpoint bp{address, nullptr, auto_clear ? 0 : s_breakpoint_counter++, 0, auto_clear, enabled};
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s_breakpoints.push_back(std::move(bp));
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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if (!auto_clear)
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{
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@ -1982,7 +2016,8 @@ bool CPU::AddBreakpointWithCallback(VirtualMemoryAddress address, BreakpointCall
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Breakpoint bp{address, callback, 0, 0, false, true};
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s_breakpoints.push_back(std::move(bp));
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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return true;
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}
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@ -1996,7 +2031,8 @@ bool CPU::RemoveBreakpoint(VirtualMemoryAddress address)
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Host::ReportFormattedDebuggerMessage(TRANSLATE("DebuggerMessage", "Removed breakpoint at 0x%08X."), address);
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s_breakpoints.erase(it);
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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if (address == s_last_breakpoint_check_pc)
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s_last_breakpoint_check_pc = INVALID_BREAKPOINT_PC;
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@ -2009,7 +2045,8 @@ void CPU::ClearBreakpoints()
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s_breakpoints.clear();
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s_breakpoint_counter = 0;
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s_last_breakpoint_check_pc = INVALID_BREAKPOINT_PC;
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UpdateDebugDispatcherFlag();
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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}
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bool CPU::AddStepOverBreakpoint()
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@ -2431,6 +2468,8 @@ void CPU::UpdateMemoryPointers()
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void CPU::ExecutionModeChanged()
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{
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g_state.bus_error = false;
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if (UpdateDebugDispatcherFlag())
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System::InterruptExecution();
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}
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template<bool add_ticks, bool icache_read, u32 word_count, bool raise_exceptions>
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@ -25,7 +25,7 @@ ALWAYS_INLINE static void CheckForPendingInterrupt()
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}
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void DispatchInterrupt();
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void UpdateDebugDispatcherFlag();
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bool UpdateDebugDispatcherFlag();
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// icache stuff
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ALWAYS_INLINE static bool IsCachedAddress(VirtualMemoryAddress address)
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