mirror of
https://github.com/RetroDECK/Duckstation.git
synced 2024-11-26 23:55:40 +00:00
PGXP: Remove some unused parameter from M{F,T}{HI,LO}
This commit is contained in:
parent
efecb44344
commit
33a5617ea3
|
@ -781,7 +781,7 @@ restart_instruction:
|
|||
case InstructionFunct::mfhi:
|
||||
{
|
||||
if constexpr (pgxp_mode >= PGXPMode::CPU)
|
||||
PGXP::CPU_MFHI(inst.bits, ReadReg(inst.r.rd), g_state.regs.hi);
|
||||
PGXP::CPU_MFHI(inst.bits, g_state.regs.hi);
|
||||
|
||||
WriteReg(inst.r.rd, g_state.regs.hi);
|
||||
}
|
||||
|
@ -791,7 +791,7 @@ restart_instruction:
|
|||
{
|
||||
const u32 value = ReadReg(inst.r.rs);
|
||||
if constexpr (pgxp_mode >= PGXPMode::CPU)
|
||||
PGXP::CPU_MTHI(inst.bits, g_state.regs.hi, value);
|
||||
PGXP::CPU_MTHI(inst.bits, value);
|
||||
|
||||
g_state.regs.hi = value;
|
||||
}
|
||||
|
@ -800,7 +800,7 @@ restart_instruction:
|
|||
case InstructionFunct::mflo:
|
||||
{
|
||||
if constexpr (pgxp_mode >= PGXPMode::CPU)
|
||||
PGXP::CPU_MFLO(inst.bits, ReadReg(inst.r.rd), g_state.regs.lo);
|
||||
PGXP::CPU_MFLO(inst.bits, g_state.regs.lo);
|
||||
|
||||
WriteReg(inst.r.rd, g_state.regs.lo);
|
||||
}
|
||||
|
@ -810,7 +810,7 @@ restart_instruction:
|
|||
{
|
||||
const u32 value = ReadReg(inst.r.rs);
|
||||
if constexpr (pgxp_mode == PGXPMode::CPU)
|
||||
PGXP::CPU_MTLO(inst.bits, g_state.regs.lo, value);
|
||||
PGXP::CPU_MTLO(inst.bits, value);
|
||||
|
||||
g_state.regs.lo = value;
|
||||
}
|
||||
|
|
|
@ -1815,7 +1815,7 @@ void CPU_SRAV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal)
|
|||
CPU_reg[rd(instr)] = ret;
|
||||
}
|
||||
|
||||
void CPU_MFHI(u32 instr, u32 rdVal, u32 hiVal)
|
||||
void CPU_MFHI(u32 instr, u32 hiVal)
|
||||
{
|
||||
// Rd = Hi
|
||||
Validate(&CPU_Hi, hiVal);
|
||||
|
@ -1823,7 +1823,7 @@ void CPU_MFHI(u32 instr, u32 rdVal, u32 hiVal)
|
|||
CPU_reg[rd(instr)] = CPU_Hi;
|
||||
}
|
||||
|
||||
void CPU_MTHI(u32 instr, u32 hiVal, u32 rdVal)
|
||||
void CPU_MTHI(u32 instr, u32 rdVal)
|
||||
{
|
||||
// Hi = Rd
|
||||
Validate(&CPU_reg[rd(instr)], rdVal);
|
||||
|
@ -1831,7 +1831,7 @@ void CPU_MTHI(u32 instr, u32 hiVal, u32 rdVal)
|
|||
CPU_Hi = CPU_reg[rd(instr)];
|
||||
}
|
||||
|
||||
void CPU_MFLO(u32 instr, u32 rdVal, u32 loVal)
|
||||
void CPU_MFLO(u32 instr, u32 loVal)
|
||||
{
|
||||
// Rd = Lo
|
||||
Validate(&CPU_Lo, loVal);
|
||||
|
@ -1839,7 +1839,7 @@ void CPU_MFLO(u32 instr, u32 rdVal, u32 loVal)
|
|||
CPU_reg[rd(instr)] = CPU_Lo;
|
||||
}
|
||||
|
||||
void CPU_MTLO(u32 instr, u32 loVal, u32 rdVal)
|
||||
void CPU_MTLO(u32 instr, u32 rdVal)
|
||||
{
|
||||
// Lo = Rd
|
||||
Validate(&CPU_reg[rd(instr)], rdVal);
|
||||
|
|
|
@ -92,10 +92,10 @@ void CPU_SRLV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal);
|
|||
void CPU_SRAV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal);
|
||||
|
||||
// Move registers
|
||||
void CPU_MFHI(u32 instr, u32 rdVal, u32 hiVal);
|
||||
void CPU_MTHI(u32 instr, u32 hiVal, u32 rdVal);
|
||||
void CPU_MFLO(u32 instr, u32 rdVal, u32 loVal);
|
||||
void CPU_MTLO(u32 instr, u32 loVal, u32 rdVal);
|
||||
void CPU_MFHI(u32 instr, u32 hiVal);
|
||||
void CPU_MTHI(u32 instr, u32 rdVal);
|
||||
void CPU_MFLO(u32 instr, u32 loVal);
|
||||
void CPU_MTLO(u32 instr, u32 rdVal);
|
||||
|
||||
// CP0 Data transfer tracking
|
||||
void CPU_MFC0(u32 instr, u32 rtVal, u32 rdVal);
|
||||
|
|
Loading…
Reference in a new issue