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GPU/SW: Fix 576-line scanout of PAL games
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parent
904680f0df
commit
43bb69fb6b
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@ -46,11 +46,7 @@ protected:
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UNIFORM_BUFFER_SIZE = 512 * 1024,
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UNIFORM_BUFFER_SIZE = 512 * 1024,
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MAX_BATCH_VERTEX_COUNTER_IDS = 65536 - 2,
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MAX_BATCH_VERTEX_COUNTER_IDS = 65536 - 2,
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MAX_VERTICES_FOR_RECTANGLE = 6 * (((MAX_PRIMITIVE_WIDTH + (TEXTURE_PAGE_WIDTH - 1)) / TEXTURE_PAGE_WIDTH) + 1u) *
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MAX_VERTICES_FOR_RECTANGLE = 6 * (((MAX_PRIMITIVE_WIDTH + (TEXTURE_PAGE_WIDTH - 1)) / TEXTURE_PAGE_WIDTH) + 1u) *
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(((MAX_PRIMITIVE_HEIGHT + (TEXTURE_PAGE_HEIGHT - 1)) / TEXTURE_PAGE_HEIGHT) + 1u),
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(((MAX_PRIMITIVE_HEIGHT + (TEXTURE_PAGE_HEIGHT - 1)) / TEXTURE_PAGE_HEIGHT) + 1u)
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// In interlaced modes, we can exceed the 512 height of VRAM, up to 576 in PAL games.
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BASE_DISPLAY_TEXTURE_WIDTH = 720,
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BASE_DISPLAY_TEXTURE_HEIGHT = 576,
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};
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};
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struct BatchVertex
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struct BatchVertex
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@ -256,8 +256,8 @@ bool GPU_HW_D3D11::CreateFramebuffer()
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D3D11_BIND_DEPTH_STENCIL) ||
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D3D11_BIND_DEPTH_STENCIL) ||
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!m_vram_read_texture.Create(m_device.Get(), texture_width, texture_height, 1, 1, texture_format,
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!m_vram_read_texture.Create(m_device.Get(), texture_width, texture_height, 1, 1, texture_format,
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D3D11_BIND_SHADER_RESOURCE) ||
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D3D11_BIND_SHADER_RESOURCE) ||
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!m_display_texture.Create(m_device.Get(), BASE_DISPLAY_TEXTURE_WIDTH * m_resolution_scale,
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!m_display_texture.Create(m_device.Get(), GPU_MAX_DISPLAY_WIDTH * m_resolution_scale,
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BASE_DISPLAY_TEXTURE_HEIGHT * m_resolution_scale, 1, 1, texture_format,
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GPU_MAX_DISPLAY_HEIGHT * m_resolution_scale, 1, 1, texture_format,
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D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET) ||
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D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET) ||
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!m_vram_encoding_texture.Create(m_device.Get(), VRAM_WIDTH, VRAM_HEIGHT, 1, 1, texture_format,
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!m_vram_encoding_texture.Create(m_device.Get(), VRAM_WIDTH, VRAM_HEIGHT, 1, 1, texture_format,
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D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET) ||
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D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET) ||
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@ -399,8 +399,8 @@ bool GPU_HW_OpenGL::CreateFramebuffer()
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!m_vram_encoding_texture.Create(VRAM_WIDTH, VRAM_HEIGHT, 1, GL_RGBA8, GL_RGBA, GL_UNSIGNED_BYTE, nullptr,
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!m_vram_encoding_texture.Create(VRAM_WIDTH, VRAM_HEIGHT, 1, GL_RGBA8, GL_RGBA, GL_UNSIGNED_BYTE, nullptr,
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false) ||
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false) ||
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!m_vram_encoding_texture.CreateFramebuffer() ||
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!m_vram_encoding_texture.CreateFramebuffer() ||
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!m_display_texture.Create(BASE_DISPLAY_TEXTURE_WIDTH * m_resolution_scale,
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!m_display_texture.Create(GPU_MAX_DISPLAY_WIDTH * m_resolution_scale,
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BASE_DISPLAY_TEXTURE_HEIGHT * m_resolution_scale, 1, GL_RGBA8, GL_RGBA,
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GPU_MAX_DISPLAY_HEIGHT * m_resolution_scale, 1, GL_RGBA8, GL_RGBA,
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GL_UNSIGNED_BYTE, nullptr, false) ||
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GL_UNSIGNED_BYTE, nullptr, false) ||
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!m_display_texture.CreateFramebuffer())
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!m_display_texture.CreateFramebuffer())
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{
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{
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@ -519,8 +519,8 @@ bool GPU_HW_Vulkan::CreateFramebuffer()
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!m_vram_read_texture.Create(texture_width, texture_height, 1, 1, texture_format, VK_SAMPLE_COUNT_1_BIT,
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!m_vram_read_texture.Create(texture_width, texture_height, 1, 1, texture_format, VK_SAMPLE_COUNT_1_BIT,
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VK_IMAGE_VIEW_TYPE_2D, VK_IMAGE_TILING_OPTIMAL,
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VK_IMAGE_VIEW_TYPE_2D, VK_IMAGE_TILING_OPTIMAL,
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VK_IMAGE_USAGE_SAMPLED_BIT | VK_IMAGE_USAGE_TRANSFER_DST_BIT) ||
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VK_IMAGE_USAGE_SAMPLED_BIT | VK_IMAGE_USAGE_TRANSFER_DST_BIT) ||
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!m_display_texture.Create(BASE_DISPLAY_TEXTURE_WIDTH * m_resolution_scale,
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!m_display_texture.Create(GPU_MAX_DISPLAY_WIDTH * m_resolution_scale,
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BASE_DISPLAY_TEXTURE_HEIGHT * m_resolution_scale, 1, 1, texture_format,
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GPU_MAX_DISPLAY_HEIGHT * m_resolution_scale, 1, 1, texture_format,
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VK_SAMPLE_COUNT_1_BIT, VK_IMAGE_VIEW_TYPE_2D, VK_IMAGE_TILING_OPTIMAL,
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VK_SAMPLE_COUNT_1_BIT, VK_IMAGE_VIEW_TYPE_2D, VK_IMAGE_TILING_OPTIMAL,
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VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT | VK_IMAGE_USAGE_SAMPLED_BIT |
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VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT | VK_IMAGE_USAGE_SAMPLED_BIT |
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VK_IMAGE_USAGE_TRANSFER_SRC_BIT | VK_IMAGE_USAGE_TRANSFER_DST_BIT) ||
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VK_IMAGE_USAGE_TRANSFER_SRC_BIT | VK_IMAGE_USAGE_TRANSFER_DST_BIT) ||
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@ -255,7 +255,7 @@ void GPU_SW::CopyOut15Bit(u32 src_x, u32 src_y, u32 width, u32 height, u32 field
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}
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}
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else
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else
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{
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{
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dst_stride = VRAM_WIDTH * sizeof(OutputPixelType);
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dst_stride = GPU_MAX_DISPLAY_WIDTH * sizeof(OutputPixelType);
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dst_ptr = m_display_texture_buffer.data() + (field != 0 ? dst_stride : 0);
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dst_ptr = m_display_texture_buffer.data() + (field != 0 ? dst_stride : 0);
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}
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}
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@ -47,7 +47,7 @@ protected:
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void FillBackendCommandParameters(GPUBackendCommand* cmd);
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void FillBackendCommandParameters(GPUBackendCommand* cmd);
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void FillDrawCommand(GPUBackendDrawCommand* cmd, GPURenderCommand rc);
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void FillDrawCommand(GPUBackendDrawCommand* cmd, GPURenderCommand rc);
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HeapArray<u8, VRAM_WIDTH * VRAM_HEIGHT * sizeof(u32)> m_display_texture_buffer;
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HeapArray<u8, GPU_MAX_DISPLAY_WIDTH * GPU_MAX_DISPLAY_HEIGHT * sizeof(u32)> m_display_texture_buffer;
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HostDisplayPixelFormat m_16bit_display_format = HostDisplayPixelFormat::RGB565;
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HostDisplayPixelFormat m_16bit_display_format = HostDisplayPixelFormat::RGB565;
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HostDisplayPixelFormat m_24bit_display_format = HostDisplayPixelFormat::RGBA8;
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HostDisplayPixelFormat m_24bit_display_format = HostDisplayPixelFormat::RGBA8;
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@ -15,6 +15,11 @@ enum : u32
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TEXTURE_PAGE_HEIGHT = 256,
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TEXTURE_PAGE_HEIGHT = 256,
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MAX_PRIMITIVE_WIDTH = 1024,
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MAX_PRIMITIVE_WIDTH = 1024,
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MAX_PRIMITIVE_HEIGHT = 512,
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MAX_PRIMITIVE_HEIGHT = 512,
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// In interlaced modes, we can exceed the 512 height of VRAM, up to 576 in PAL games.
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GPU_MAX_DISPLAY_WIDTH = 720,
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GPU_MAX_DISPLAY_HEIGHT = 576,
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DITHER_MATRIX_SIZE = 4
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DITHER_MATRIX_SIZE = 4
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};
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};
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