diff --git a/src/pse/cpu_core.cpp b/src/pse/cpu_core.cpp index 03eba23d6..2eec84a61 100644 --- a/src/pse/cpu_core.cpp +++ b/src/pse/cpu_core.cpp @@ -256,7 +256,8 @@ void Core::Execute() m_current_instruction_pc = m_regs.pc; // fetch the next instruction - FetchInstruction(); + if (!FetchInstruction()) + return; // handle branch delays - we are now in a delay slot if we just branched m_in_branch_delay_slot = m_branched; @@ -272,12 +273,20 @@ void Core::Execute() m_next_load_delay_old_value = 0; } -void Core::FetchInstruction() +bool Core::FetchInstruction() { + m_regs.pc = m_regs.npc; + + if (!DoAlignmentCheck(static_cast(m_regs.npc))) + { + // this will call FetchInstruction() again when the pipeline is flushed. + return false; + } + DoMemoryAccess( static_cast(m_regs.npc), m_next_instruction.bits); - m_regs.pc = m_regs.npc; m_regs.npc += sizeof(m_next_instruction.bits); + return true; } void Core::ExecuteInstruction(Instruction inst) diff --git a/src/pse/cpu_core.h b/src/pse/cpu_core.h index e5804f0fd..c358e4717 100644 --- a/src/pse/cpu_core.h +++ b/src/pse/cpu_core.h @@ -65,7 +65,7 @@ private: void DisassembleAndPrint(u32 addr); // Fetches the instruction at m_regs.npc - void FetchInstruction(); + bool FetchInstruction(); void ExecuteInstruction(Instruction inst); void ExecuteCop0Instruction(Instruction inst); void Branch(u32 target);