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Bus: Work around VS2017 bug with std::array

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This commit is contained in:
Connor McLaughlin 2020-07-08 12:44:12 +10:00
parent 6ae5caa23b
commit 57cf40d1ae
3 changed files with 8 additions and 8 deletions
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8
src/core/bus.cpp
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@ -55,7 +55,7 @@ void Bus::Initialize(CPU::Core* cpu, CPU::CodeCache* cpu_code_cache, DMA* dma,
void Bus::Reset() void Bus::Reset()
{ {
m_ram.fill(static_cast<u8>(0)); std::memset(m_ram, 0, sizeof(m_ram));
m_MEMCTRL.exp1_base = 0x1F000000; m_MEMCTRL.exp1_base = 0x1F000000;
m_MEMCTRL.exp2_base = 0x1F802000; m_MEMCTRL.exp2_base = 0x1F802000;
m_MEMCTRL.exp1_delay_size.bits = 0x0013243F; m_MEMCTRL.exp1_delay_size.bits = 0x0013243F;
@ -76,8 +76,8 @@ bool Bus::DoState(StateWrapper& sw)
sw.Do(&m_bios_access_time); sw.Do(&m_bios_access_time);
sw.Do(&m_cdrom_access_time); sw.Do(&m_cdrom_access_time);
sw.Do(&m_spu_access_time); sw.Do(&m_spu_access_time);
sw.DoBytes(m_ram.data(), m_ram.size()); sw.DoBytes(m_ram, sizeof(m_ram));
sw.DoBytes(m_bios.data(), m_bios.size()); sw.DoBytes(m_bios, sizeof(m_bios));
sw.DoArray(m_MEMCTRL.regs, countof(m_MEMCTRL.regs)); sw.DoArray(m_MEMCTRL.regs, countof(m_MEMCTRL.regs));
sw.Do(&m_ram_size_reg); sw.Do(&m_ram_size_reg);
sw.Do(&m_tty_line_buffer); sw.Do(&m_tty_line_buffer);
@ -183,7 +183,7 @@ void Bus::SetBIOS(const std::vector<u8>& image)
return; return;
} }
std::copy(image.cbegin(), image.cend(), m_bios.begin()); std::memcpy(m_bios, image.data(), BIOS_SIZE);
} }
std::tuple<TickCount, TickCount, TickCount> Bus::CalculateMemoryTiming(MEMDELAY mem_delay, COMDELAY common_delay) std::tuple<TickCount, TickCount, TickCount> Bus::CalculateMemoryTiming(MEMDELAY mem_delay, COMDELAY common_delay)

6
src/core/bus.h
View file

@ -239,7 +239,7 @@ private:
void DoInvalidateCodeCache(u32 page_index); void DoInvalidateCodeCache(u32 page_index);
/// Direct access to RAM - used by DMA. /// Direct access to RAM - used by DMA.
ALWAYS_INLINE u8* GetRAM() { return m_ram.data(); } ALWAYS_INLINE u8* GetRAM() { return m_ram; }
/// Returns the number of cycles stolen by DMA RAM access. /// Returns the number of cycles stolen by DMA RAM access.
ALWAYS_INLINE static TickCount GetDMARAMTickCount(u32 word_count) ALWAYS_INLINE static TickCount GetDMARAMTickCount(u32 word_count)
@ -282,8 +282,8 @@ private:
std::array<TickCount, 3> m_spu_access_time = {}; std::array<TickCount, 3> m_spu_access_time = {};
std::bitset<CPU_CODE_CACHE_PAGE_COUNT> m_ram_code_bits{}; std::bitset<CPU_CODE_CACHE_PAGE_COUNT> m_ram_code_bits{};
std::array<u8, RAM_SIZE> m_ram{}; // 2MB RAM u8 m_ram[RAM_SIZE]{}; // 2MB RAM
std::array<u8, BIOS_SIZE> m_bios{}; // 512K BIOS ROM u8 m_bios[BIOS_SIZE]{}; // 512K BIOS ROM
std::vector<u8> m_exp1_rom; std::vector<u8> m_exp1_rom;
MEMCTRL m_MEMCTRL = {}; MEMCTRL m_MEMCTRL = {};

2
src/core/dma.cpp
View file

@ -518,7 +518,7 @@ TickCount DMA::TransferDeviceToMemory(Channel channel, u32 address, u32 incremen
if (dest_pointer == m_transfer_buffer.data()) if (dest_pointer == m_transfer_buffer.data())
{ {
u8* ram_pointer = m_bus->m_ram.data(); u8* ram_pointer = m_bus->m_ram;
for (u32 i = 0; i < word_count; i++) for (u32 i = 0; i < word_count; i++)
{ {
std::memcpy(&ram_pointer[address], &m_transfer_buffer[i], sizeof(u32)); std::memcpy(&ram_pointer[address], &m_transfer_buffer[i], sizeof(u32));