From 591a2228d69e79e8784272c5c93d8f495af38661 Mon Sep 17 00:00:00 2001 From: Stenzek Date: Tue, 5 Dec 2023 18:20:54 +1000 Subject: [PATCH] GTE: Add register names for debugging --- src/core/cpu_pgxp.cpp | 34 ++++++++++++++++++++++++++-------- src/core/gte.cpp | 12 ++++++++++++ src/core/gte.h | 2 ++ 3 files changed, 40 insertions(+), 8 deletions(-) diff --git a/src/core/cpu_pgxp.cpp b/src/core/cpu_pgxp.cpp index 5125c52ca..dcb61ca95 100644 --- a/src/core/cpu_pgxp.cpp +++ b/src/core/cpu_pgxp.cpp @@ -149,8 +149,8 @@ void CPU::PGXP::Shutdown() } std::memset(g_state.pgxp_gte, 0, sizeof(g_state.pgxp_gte)); - std::memset(g_state.pgxp_gpr, 0, sizeof(g_state.pgxp_gpr)); + std::memset(g_state.pgxp_cop0, 0, sizeof(g_state.pgxp_cop0)); } @@ -178,12 +178,12 @@ void CPU::PGXP::Shutdown() ALWAYS_INLINE_RELEASE void CPU::PGXP::MakeValid(PGXP_value* pV, u32 psxV) { - if (VALID_01 != (pV->flags & VALID_01)) + if ((pV->flags & VALID_01) != VALID_01) { pV->x = static_cast(static_cast(Truncate16(psxV))); pV->y = static_cast(static_cast(Truncate16(psxV >> 16))); pV->z = 0.f; - pV->flags |= VALID_01; + pV->flags = VALID_01; pV->value = psxV; } } @@ -276,9 +276,19 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::ValidateAndCopyMem16(PGXP_value* dest, u32 } // truncate value - dest->y = (dest->x < 0) ? -1.f * sign : 0.f; // 0.f; + if (dest->compFlags[0] == VALID) + { + // only set y as valid if x is also valid.. don't want to make fake values + dest->y = (dest->x < 0) ? -1.f * sign : 0.f; // 0.f; + dest->compFlags[1] = VALID; // iCB: High word is valid, just 0 + } + else + { + dest->y = 0.0f; + dest->compFlags[1] = 0; + } + dest->value = value; - dest->compFlags[1] = VALID; // iCB: High word is valid, just 0 return; } @@ -562,9 +572,7 @@ void CPU::PGXP::CPU_SB(u32 instr, u32 addr, u32 rtVal) void CPU::PGXP::CPU_SH(u32 instr, u32 addr, u32 rtVal) { PGXP_value* val = &g_state.pgxp_gpr[rt(instr)]; - - // validate and copy half value - MaskValidate(val, rtVal, 0xFFFF, VALID_0); + Validate(val, rtVal); WriteMem16(val, addr); } @@ -1391,6 +1399,16 @@ void CPU::PGXP::CPU_SRA(u32 instr, u32 rtVal) ret.x = (float)x; ret.y = (float)y; + // Use low precision/rounded values when we're not shifting an entire component, + // and it's not originally from a 3D value. Too many false positives in P2/etc. + // What we probably should do is not set the valid flag on non-3D values to begin + // with, only letting them become valid when used in another expression. + if (!(ret.flags & VALID_2) && sh < 16) + { + ret.flags = 0; + MakeValid(&ret, rdVal); + } + ret.value = rdVal; g_state.pgxp_gpr[rd(instr)] = ret; } diff --git a/src/core/gte.cpp b/src/core/gte.cpp index 3582429dd..226b93771 100644 --- a/src/core/gte.cpp +++ b/src/core/gte.cpp @@ -1401,3 +1401,15 @@ GTE::InstructionImpl GTE::GetInstructionImpl(u32 inst_bits, TickCount* ticks) Panic("Missing handler"); } } + +const char* GTE::GetRegisterName(u32 index) +{ + static constexpr std::array names = { + {"V0_XY", "V0_Z", "V1_XY", "V1_Z", "V2_XY", "V2_Z", "RGBC", "OTZ", "IR0", "IR1", "IR2", "IR3", "SXY0", + "SXY1", "SXY2", "SXYP", "SZ0", "SZ1", "SZ2", "SZ3", "RGB0", "RGB1", "RGB2", "RES1", "MAC0", "MAC1", + "MAC2", "MAC3", "IRGB", "ORGB", "LZCS", "LZCR", "RT_0", "RT_1", "RT_2", "RT_3", "RT_4", "TRX", "TRY", + "TRZ", "LLM_0", "LLM_1", "LLM_2", "LLM_3", "LLM_4", "RBK", "GBK", "BBK", "LCM_0", "LCM_1", "LCM_2", "LCM_3", + "LCM_4", "RFC", "GFC", "BFC", "OFX", "OFY", "H", "DQA", "DQB", "ZSF3", "ZSF4", "FLAG"}}; + + return (index < names.size()) ? names[index] : ""; +} diff --git a/src/core/gte.h b/src/core/gte.h index c2249dd01..67165c9d8 100644 --- a/src/core/gte.h +++ b/src/core/gte.h @@ -25,4 +25,6 @@ void ExecuteInstruction(u32 inst_bits); using InstructionImpl = void (*)(Instruction); InstructionImpl GetInstructionImpl(u32 inst_bits, TickCount* ticks); +const char* GetRegisterName(u32 index); + } // namespace GTE