From 6a17a558bb09520bcbbc14bcda0dd70cd9feca18 Mon Sep 17 00:00:00 2001 From: Connor McLaughlin Date: Thu, 20 Aug 2020 01:05:03 +1000 Subject: [PATCH] CPU: Linux compile fix --- src/core/cpu_core.cpp | 6 +++--- src/core/pgxp.cpp | 12 ++++++------ src/core/pgxp.h | 9 +++++---- 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/src/core/cpu_core.cpp b/src/core/cpu_core.cpp index 87057b51d..16c4c9e04 100644 --- a/src/core/cpu_core.cpp +++ b/src/core/cpu_core.cpp @@ -554,7 +554,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction() { const u32 new_value = ReadReg(inst.r.rs) & ReadReg(inst.r.rt); if constexpr (pgxp_mode >= PGXPMode::CPU) - PGXP::CPU_AND(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); + PGXP::CPU_AND_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); WriteReg(inst.r.rd, new_value); } @@ -564,7 +564,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction() { const u32 new_value = ReadReg(inst.r.rs) | ReadReg(inst.r.rt); if constexpr (pgxp_mode >= PGXPMode::CPU) - PGXP::CPU_OR(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); + PGXP::CPU_OR_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); WriteReg(inst.r.rd, new_value); } @@ -574,7 +574,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction() { const u32 new_value = ReadReg(inst.r.rs) ^ ReadReg(inst.r.rt); if constexpr (pgxp_mode >= PGXPMode::CPU) - PGXP::CPU_XOR(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); + PGXP::CPU_XOR_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); WriteReg(inst.r.rd, new_value); } diff --git a/src/core/pgxp.cpp b/src/core/pgxp.cpp index 0c7de1894..88285b1d2 100644 --- a/src/core/pgxp.cpp +++ b/src/core/pgxp.cpp @@ -1101,7 +1101,7 @@ void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) CPU_SUB(instr, rdVal, rsVal, rtVal); } -void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) +void CPU_AND_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) { // Rd = Rs & Rt psx_value vald, vals, valt; @@ -1193,22 +1193,22 @@ void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) CPU_reg[rd(instr)] = ret; } -void CPU_OR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) +void CPU_OR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) { // Rd = Rs | Rt - CPU_AND(instr, rdVal, rsVal, rtVal); + CPU_AND_(instr, rdVal, rsVal, rtVal); } -void CPU_XOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) +void CPU_XOR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) { // Rd = Rs ^ Rt - CPU_AND(instr, rdVal, rsVal, rtVal); + CPU_AND_(instr, rdVal, rsVal, rtVal); } void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) { // Rd = Rs NOR Rt - CPU_AND(instr, rdVal, rsVal, rtVal); + CPU_AND_(instr, rdVal, rsVal, rtVal); } void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) diff --git a/src/core/pgxp.h b/src/core/pgxp.h index 94fb0fb49..db3192cd4 100644 --- a/src/core/pgxp.h +++ b/src/core/pgxp.h @@ -41,7 +41,8 @@ void CPU_CTC2(u32 instr, u32 rdVal, u32 rtVal); // copy GPR reg to GTE ctrl reg void CPU_LWC2(u32 instr, u32 rtVal, u32 addr); // copy memory to GTE reg void CPU_SWC2(u32 instr, u32 rtVal, u32 addr); // copy GTE reg to memory -bool GetPreciseVertex(u32 addr, u32 value, int x, int y, int xOffs, int yOffs, float* out_x, float* out_y, float* out_w); +bool GetPreciseVertex(u32 addr, u32 value, int x, int y, int xOffs, int yOffs, float* out_x, float* out_y, + float* out_w); // -- CPU functions void CPU_LW(u32 instr, u32 rtVal, u32 addr); @@ -68,9 +69,9 @@ void CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_ADDU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); -void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); -void CPU_OR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); -void CPU_XOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); +void CPU_AND_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); +void CPU_OR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); +void CPU_XOR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SLTU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);