Xargon/Duckstation
1
0
Fork 0
mirror of https://github.com/RetroDECK/Duckstation.git synced 2025-02-18 11:55:38 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

CPU: Linux compile fix

Browse source
This commit is contained in:
Connor McLaughlin 2020-08-20 01:05:03 +10:00
parent b17335d812
commit 6a17a558bb
3 changed files with 14 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/core/cpu_core.cpp
View file

@ -554,7 +554,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction()
{ {
const u32 new_value = ReadReg(inst.r.rs) & ReadReg(inst.r.rt); const u32 new_value = ReadReg(inst.r.rs) & ReadReg(inst.r.rt);
if constexpr (pgxp_mode >= PGXPMode::CPU) if constexpr (pgxp_mode >= PGXPMode::CPU)
PGXP::CPU_AND(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); PGXP::CPU_AND_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
WriteReg(inst.r.rd, new_value); WriteReg(inst.r.rd, new_value);
} }
@ -564,7 +564,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction()
{ {
const u32 new_value = ReadReg(inst.r.rs) | ReadReg(inst.r.rt); const u32 new_value = ReadReg(inst.r.rs) | ReadReg(inst.r.rt);
if constexpr (pgxp_mode >= PGXPMode::CPU) if constexpr (pgxp_mode >= PGXPMode::CPU)
PGXP::CPU_OR(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); PGXP::CPU_OR_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
WriteReg(inst.r.rd, new_value); WriteReg(inst.r.rd, new_value);
} }
@ -574,7 +574,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction()
{ {
const u32 new_value = ReadReg(inst.r.rs) ^ ReadReg(inst.r.rt); const u32 new_value = ReadReg(inst.r.rs) ^ ReadReg(inst.r.rt);
if constexpr (pgxp_mode >= PGXPMode::CPU) if constexpr (pgxp_mode >= PGXPMode::CPU)
PGXP::CPU_XOR(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt)); PGXP::CPU_XOR_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
WriteReg(inst.r.rd, new_value); WriteReg(inst.r.rd, new_value);
} }

12
src/core/pgxp.cpp
View file

@ -1101,7 +1101,7 @@ void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
CPU_SUB(instr, rdVal, rsVal, rtVal); CPU_SUB(instr, rdVal, rsVal, rtVal);
} }
void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) void CPU_AND_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
{ {
// Rd = Rs & Rt // Rd = Rs & Rt
psx_value vald, vals, valt; psx_value vald, vals, valt;
@ -1193,22 +1193,22 @@ void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
CPU_reg[rd(instr)] = ret; CPU_reg[rd(instr)] = ret;
} }
void CPU_OR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) void CPU_OR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
{ {
// Rd = Rs | Rt // Rd = Rs | Rt
CPU_AND(instr, rdVal, rsVal, rtVal); CPU_AND_(instr, rdVal, rsVal, rtVal);
} }
void CPU_XOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) void CPU_XOR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
{ {
// Rd = Rs ^ Rt // Rd = Rs ^ Rt
CPU_AND(instr, rdVal, rsVal, rtVal); CPU_AND_(instr, rdVal, rsVal, rtVal);
} }
void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
{ {
// Rd = Rs NOR Rt // Rd = Rs NOR Rt
CPU_AND(instr, rdVal, rsVal, rtVal); CPU_AND_(instr, rdVal, rsVal, rtVal);
} }
void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal) void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)

9
src/core/pgxp.h
View file

@ -41,7 +41,8 @@ void CPU_CTC2(u32 instr, u32 rdVal, u32 rtVal); // copy GPR reg to GTE ctrl reg
void CPU_LWC2(u32 instr, u32 rtVal, u32 addr); // copy memory to GTE reg void CPU_LWC2(u32 instr, u32 rtVal, u32 addr); // copy memory to GTE reg
void CPU_SWC2(u32 instr, u32 rtVal, u32 addr); // copy GTE reg to memory void CPU_SWC2(u32 instr, u32 rtVal, u32 addr); // copy GTE reg to memory
bool GetPreciseVertex(u32 addr, u32 value, int x, int y, int xOffs, int yOffs, float* out_x, float* out_y, float* out_w); bool GetPreciseVertex(u32 addr, u32 value, int x, int y, int xOffs, int yOffs, float* out_x, float* out_y,
float* out_w);
// -- CPU functions // -- CPU functions
void CPU_LW(u32 instr, u32 rtVal, u32 addr); void CPU_LW(u32 instr, u32 rtVal, u32 addr);
@ -68,9 +69,9 @@ void CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_ADDU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_ADDU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_AND_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_OR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_OR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_XOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_XOR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
void CPU_SLTU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal); void CPU_SLTU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);