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CPU: Linux compile fix
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b17335d812
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6a17a558bb
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@ -554,7 +554,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction()
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{
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const u32 new_value = ReadReg(inst.r.rs) & ReadReg(inst.r.rt);
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if constexpr (pgxp_mode >= PGXPMode::CPU)
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PGXP::CPU_AND(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
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PGXP::CPU_AND_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
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WriteReg(inst.r.rd, new_value);
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}
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@ -564,7 +564,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction()
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{
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const u32 new_value = ReadReg(inst.r.rs) | ReadReg(inst.r.rt);
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if constexpr (pgxp_mode >= PGXPMode::CPU)
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PGXP::CPU_OR(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
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PGXP::CPU_OR_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
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WriteReg(inst.r.rd, new_value);
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}
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@ -574,7 +574,7 @@ ALWAYS_INLINE_RELEASE static void ExecuteInstruction()
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{
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const u32 new_value = ReadReg(inst.r.rs) ^ ReadReg(inst.r.rt);
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if constexpr (pgxp_mode >= PGXPMode::CPU)
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PGXP::CPU_XOR(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
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PGXP::CPU_XOR_(inst.bits, new_value, ReadReg(inst.r.rs), ReadReg(inst.r.rt));
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WriteReg(inst.r.rd, new_value);
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}
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@ -1101,7 +1101,7 @@ void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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CPU_SUB(instr, rdVal, rsVal, rtVal);
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}
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void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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void CPU_AND_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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{
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// Rd = Rs & Rt
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psx_value vald, vals, valt;
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@ -1193,22 +1193,22 @@ void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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CPU_reg[rd(instr)] = ret;
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}
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void CPU_OR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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void CPU_OR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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{
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// Rd = Rs | Rt
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CPU_AND(instr, rdVal, rsVal, rtVal);
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CPU_AND_(instr, rdVal, rsVal, rtVal);
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}
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void CPU_XOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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void CPU_XOR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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{
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// Rd = Rs ^ Rt
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CPU_AND(instr, rdVal, rsVal, rtVal);
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CPU_AND_(instr, rdVal, rsVal, rtVal);
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}
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void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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{
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// Rd = Rs NOR Rt
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CPU_AND(instr, rdVal, rsVal, rtVal);
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CPU_AND_(instr, rdVal, rsVal, rtVal);
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}
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void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
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@ -41,7 +41,8 @@ void CPU_CTC2(u32 instr, u32 rdVal, u32 rtVal); // copy GPR reg to GTE ctrl reg
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void CPU_LWC2(u32 instr, u32 rtVal, u32 addr); // copy memory to GTE reg
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void CPU_SWC2(u32 instr, u32 rtVal, u32 addr); // copy GTE reg to memory
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bool GetPreciseVertex(u32 addr, u32 value, int x, int y, int xOffs, int yOffs, float* out_x, float* out_y, float* out_w);
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bool GetPreciseVertex(u32 addr, u32 value, int x, int y, int xOffs, int yOffs, float* out_x, float* out_y,
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float* out_w);
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// -- CPU functions
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void CPU_LW(u32 instr, u32 rtVal, u32 addr);
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@ -68,9 +69,9 @@ void CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_ADDU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_SUBU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_OR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_XOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_AND_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_OR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_XOR_(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_NOR(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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void CPU_SLTU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal);
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