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Misc: Align CPU state and SPU voices to cache lines

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Fixes the ~12% performance regression from the texture replacement
namespace'ify commit. Apparently LTO was placing the CPU struct in the
middle of a cache line...
This commit is contained in:
Stenzek 2024-07-06 18:49:35 +10:00
parent d021a61eb5
commit 77488db3dc
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4 changed files with 4 additions and 3 deletions
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1
src/common/types.h
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@ -199,6 +199,7 @@ static constexpr u32 HOST_CACHE_LINE_SIZE = 128; // Apple Silicon uses 128b cach
#else
static constexpr u32 HOST_CACHE_LINE_SIZE = 64; // Everything else is 64b.
#endif
#define ALIGN_TO_CACHE_LINE alignas(HOST_CACHE_LINE_SIZE)
// Enum class bitwise operators
#define IMPLEMENT_ENUM_CLASS_BITWISE_OPERATORS(type_) \

2
src/core/cpu_core.cpp
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@ -89,7 +89,7 @@ static bool WriteMemoryByte(VirtualMemoryAddress addr, u32 value);
static bool WriteMemoryHalfWord(VirtualMemoryAddress addr, u32 value);
static bool WriteMemoryWord(VirtualMemoryAddress addr, u32 value);
State g_state;
alignas(HOST_CACHE_LINE_SIZE) State g_state;
bool TRACE_EXECUTION = false;
static fastjmp_buf s_jmp_buf;

2
src/core/cpu_core.h
View file

@ -121,7 +121,7 @@ struct State
static constexpr u32 GTERegisterOffset(u32 index) { return OFFSETOF(State, gte_regs.r32) + (sizeof(u32) * index); }
};
extern State g_state;
ALIGN_TO_CACHE_LINE extern State g_state;
void Initialize();
void Shutdown();

2
src/core/spu.cpp
View file

@ -401,7 +401,7 @@ static std::array<std::array<s16, 128>, 2> s_reverb_downsample_buffer;
static std::array<std::array<s16, 64>, 2> s_reverb_upsample_buffer;
static s32 s_reverb_resample_buffer_position = 0;
static std::array<Voice, NUM_VOICES> s_voices{};
ALIGN_TO_CACHE_LINE static std::array<Voice, NUM_VOICES> s_voices{};
static InlineFIFOQueue<u16, FIFO_SIZE_IN_HALFWORDS> s_transfer_fifo;