CPU/Recompiler: Fix performance regression in AArch32/64

This commit is contained in:
Connor McLaughlin 2021-06-21 22:04:38 +10:00
parent b2e8aa2d30
commit 7b87b386a9
3 changed files with 2 additions and 6 deletions

View file

@ -1469,8 +1469,6 @@ void CodeGenerator::EmitStoreGuestMemoryFastmem(const CodeBlockInstruction& cbi,
void CodeGenerator::EmitStoreGuestMemorySlowmem(const CodeBlockInstruction& cbi, const Value& address, RegSize size,
const Value& value, bool in_far_code)
{
AddPendingCycles(true);
Value value_in_hr = GetValueInHostRegister(value);
if (g_settings.cpu_recompiler_memory_exceptions)

View file

@ -1665,8 +1665,6 @@ void CodeGenerator::EmitStoreGuestMemoryFastmem(const CodeBlockInstruction& cbi,
void CodeGenerator::EmitStoreGuestMemorySlowmem(const CodeBlockInstruction& cbi, const Value& address, RegSize size,
const Value& value, bool in_far_code)
{
AddPendingCycles(true);
Value value_in_hr = GetValueInHostRegister(value);
if (g_settings.cpu_recompiler_memory_exceptions)

View file

@ -44,8 +44,8 @@ Value CodeGenerator::EmitLoadGuestMemory(const CodeBlockInstruction& cbi, const
if (g_settings.IsUsingFastmem() && Bus::IsRAMAddress(static_cast<u32>(address.constant_value)))
{
// have to mask away the high bits for mirrors, since we don't map them in fastmem
EmitLoadGuestRAMFastmem(Value::FromConstantU32(static_cast<u32>(address.constant_value) & Bus::g_ram_mask), size,
result);
EmitLoadGuestRAMFastmem(Value::FromConstantU32(static_cast<u32>(address.constant_value) & Bus::g_ram_mask),
size, result);
}
else
{