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CPU/NewRec: Fix incorrect condition in GenerateCall()

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This commit is contained in:
Stenzek 2024-07-14 21:18:24 +10:00
parent a5a320720a
commit 8698298499
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5 changed files with 9 additions and 9 deletions
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4
src/core/cpu_newrec_compiler_aarch32.cpp
View file

@ -349,9 +349,9 @@ void CPU::NewRec::AArch32Compiler::GenerateCall(const void* func, s32 arg1reg /*
{ {
if (arg1reg >= 0 && arg1reg != static_cast<s32>(RARG1.GetCode())) if (arg1reg >= 0 && arg1reg != static_cast<s32>(RARG1.GetCode()))
armAsm->mov(RARG1, Register(arg1reg)); armAsm->mov(RARG1, Register(arg1reg));
if (arg1reg >= 0 && arg2reg != static_cast<s32>(RARG2.GetCode())) if (arg2reg >= 0 && arg2reg != static_cast<s32>(RARG2.GetCode()))
armAsm->mov(RARG2, Register(arg2reg)); armAsm->mov(RARG2, Register(arg2reg));
if (arg1reg >= 0 && arg3reg != static_cast<s32>(RARG3.GetCode())) if (arg3reg >= 0 && arg3reg != static_cast<s32>(RARG3.GetCode()))
armAsm->mov(RARG3, Register(arg3reg)); armAsm->mov(RARG3, Register(arg3reg));
EmitCall(func); EmitCall(func);
} }

4
src/core/cpu_newrec_compiler_aarch64.cpp
View file

@ -321,9 +321,9 @@ void CPU::NewRec::AArch64Compiler::GenerateCall(const void* func, s32 arg1reg /*
{ {
if (arg1reg >= 0 && arg1reg != static_cast<s32>(RXARG1.GetCode())) if (arg1reg >= 0 && arg1reg != static_cast<s32>(RXARG1.GetCode()))
armAsm->mov(RXARG1, XRegister(arg1reg)); armAsm->mov(RXARG1, XRegister(arg1reg));
if (arg1reg >= 0 && arg2reg != static_cast<s32>(RXARG2.GetCode())) if (arg2reg >= 0 && arg2reg != static_cast<s32>(RXARG2.GetCode()))
armAsm->mov(RXARG2, XRegister(arg2reg)); armAsm->mov(RXARG2, XRegister(arg2reg));
if (arg1reg >= 0 && arg3reg != static_cast<s32>(RXARG3.GetCode())) if (arg3reg >= 0 && arg3reg != static_cast<s32>(RXARG3.GetCode()))
armAsm->mov(RXARG3, XRegister(arg3reg)); armAsm->mov(RXARG3, XRegister(arg3reg));
EmitCall(func); EmitCall(func);
} }

4
src/core/cpu_newrec_compiler_riscv64.cpp
View file

@ -572,9 +572,9 @@ void CPU::NewRec::RISCV64Compiler::GenerateCall(const void* func, s32 arg1reg /*
{ {
if (arg1reg >= 0 && arg1reg != static_cast<s32>(RARG1.Index())) if (arg1reg >= 0 && arg1reg != static_cast<s32>(RARG1.Index()))
rvAsm->MV(RARG1, GPR(arg1reg)); rvAsm->MV(RARG1, GPR(arg1reg));
if (arg1reg >= 0 && arg2reg != static_cast<s32>(RARG2.Index())) if (arg2reg >= 0 && arg2reg != static_cast<s32>(RARG2.Index()))
rvAsm->MV(RARG2, GPR(arg2reg)); rvAsm->MV(RARG2, GPR(arg2reg));
if (arg1reg >= 0 && arg3reg != static_cast<s32>(RARG3.Index())) if (arg3reg >= 0 && arg3reg != static_cast<s32>(RARG3.Index()))
rvAsm->MV(RARG3, GPR(arg3reg)); rvAsm->MV(RARG3, GPR(arg3reg));
EmitCall(func); EmitCall(func);
} }

4
src/core/cpu_newrec_compiler_x64.cpp
View file

@ -214,9 +214,9 @@ void CPU::NewRec::X64Compiler::GenerateCall(const void* func, s32 arg1reg /*= -1
{ {
if (arg1reg >= 0 && arg1reg != static_cast<s32>(RXARG1.getIdx())) if (arg1reg >= 0 && arg1reg != static_cast<s32>(RXARG1.getIdx()))
cg->mov(RXARG1, Reg64(arg1reg)); cg->mov(RXARG1, Reg64(arg1reg));
if (arg1reg >= 0 && arg2reg != static_cast<s32>(RXARG2.getIdx())) if (arg2reg >= 0 && arg2reg != static_cast<s32>(RXARG2.getIdx()))
cg->mov(RXARG2, Reg64(arg2reg)); cg->mov(RXARG2, Reg64(arg2reg));
if (arg1reg >= 0 && arg3reg != static_cast<s32>(RXARG3.getIdx())) if (arg3reg >= 0 && arg3reg != static_cast<s32>(RXARG3.getIdx()))
cg->mov(RXARG3, Reg64(arg3reg)); cg->mov(RXARG3, Reg64(arg3reg));
cg->call(func); cg->call(func);
} }

2
src/core/fullscreen_ui.cpp
View file

@ -4822,7 +4822,7 @@ void FullscreenUI::DrawPostProcessingSettingsPage()
case 3: case 3:
{ {
changed = ImGui::SliderInt2("##value", &opt.value[0].int_value, opt.min_value[0].int_value, changed = ImGui::SliderInt3("##value", &opt.value[0].int_value, opt.min_value[0].int_value,
opt.max_value[0].int_value); opt.max_value[0].int_value);
} }
break; break;