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CMake: Detect cache line size dynamically on AArch64 Linux
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parent
d9003b10c3
commit
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@ -29,6 +29,7 @@ detect_operating_system()
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detect_compiler()
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detect_architecture()
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detect_page_size()
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detect_cache_line_size()
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# Build options. Depends on system attributes.
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include(DuckStationBuildOptions)
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@ -139,3 +139,58 @@ int main() {
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set(HOST_PAGE_SIZE ${detect_page_size_output} CACHE STRING "Reported host page size")
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endif()
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endfunction()
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function(detect_cache_line_size)
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# This is only needed for ARM64, or if the user hasn't overridden it explicitly.
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if(NOT CPU_ARCH_ARM64 OR HOST_CACHE_LINE_SIZE)
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return()
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endif()
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if(NOT LINUX)
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# For universal Apple builds, we use preprocessor macros to determine page size.
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# Similar for Windows, except it's always 64 bytes.
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return()
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endif()
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if(CMAKE_CROSSCOMPILING)
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message(WARNING "Cross-compiling and can't determine page size, assuming default.")
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return()
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endif()
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message(STATUS "Determining host cache line size")
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set(detect_cache_line_size_file ${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}/CMakeTmp/src.c)
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file(WRITE ${detect_cache_line_size_file} "
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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int main() {
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int l1i = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
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int l1d = sysconf(_SC_LEVEL1_ICACHE_LINESIZE);
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int res = (l1i > l1d) ? l1i : l1d;
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for (int index = 0; index < 16; index++) {
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char buf[128];
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snprintf(buf, sizeof(buf), \"/sys/devices/system/cpu/cpu0/cache/index%d/coherency_line_size\", index);
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FILE* fp = fopen(buf, \"rb\");
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if (!fp)
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break;
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fread(buf, sizeof(buf), 1, fp);
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fclose(fp);
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int val = atoi(buf);
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res = (val > res) ? val : res;
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}
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printf(\"%d\", res);
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return (res > 0) ? EXIT_SUCCESS : EXIT_FAILURE;
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}")
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try_run(
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detect_cache_line_size_run_result
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detect_cache_line_size_compile_result
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${CMAKE_BINARY_DIR}${CMAKE_FILES_DIRECTORY}
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${detect_cache_line_size_file}
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RUN_OUTPUT_VARIABLE detect_cache_line_size_output)
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if(NOT detect_cache_line_size_compile_result OR NOT detect_cache_line_size_run_result EQUAL 0)
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message(FATAL_ERROR "Could not determine host cache line size.")
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else()
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message(STATUS "Host cache line size: ${detect_cache_line_size_output}")
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set(HOST_CACHE_LINE_SIZE ${detect_cache_line_size_output} CACHE STRING "Reported host cache line size")
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endif()
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endfunction()
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@ -111,3 +111,6 @@ endif()
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if(HOST_PAGE_SIZE)
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target_compile_definitions(common PUBLIC "-DOVERRIDE_HOST_PAGE_SIZE=${HOST_PAGE_SIZE}")
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endif()
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if(HOST_CACHE_LINE_SIZE)
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target_compile_definitions(common PUBLIC "-DOVERRIDE_HOST_CACHE_LINE_SIZE=${HOST_CACHE_LINE_SIZE}")
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endif()
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@ -192,7 +192,9 @@ static constexpr u32 HOST_PAGE_SHIFT = 12;
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#endif
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// Host cache line sizes.
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#if defined(__APPLE__) && defined(__aarch64__)
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#if defined(OVERRIDE_HOST_CACHE_LINE_SIZE)
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static constexpr u32 HOST_CACHE_LINE_SIZE = OVERRIDE_HOST_CACHE_LINE_SIZE;
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#elif defined(__APPLE__) && defined(__aarch64__)
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static constexpr u32 HOST_CACHE_LINE_SIZE = 128; // Apple Silicon uses 128b cache lines.
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#else
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static constexpr u32 HOST_CACHE_LINE_SIZE = 64; // Everything else is 64b.
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