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https://github.com/RetroDECK/Duckstation.git
synced 2024-11-22 05:45:38 +00:00
CPU/PGXP: Combine static/variable shift instructions
This commit is contained in:
Stenzek
parent
e5c241b9f5
commit
8975b937d4
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@ -89,6 +89,9 @@ static void ValidateAndLoadMem16(PGXP_value* dest, u32 addr, u32 value, bool sig
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static void CPU_MTC2_int(const PGXP_value& value, u32 reg, u32 val);
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static void CPU_BITWISE(Instruction instr, u32 rdVal, u32 rsVal, u32 rtVal);
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static void CPU_SLL(Instruction instr, u32 rtVal, u32 sh);
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static void CPU_SRL(Instruction instr, u32 rtVal, u32 sh);
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static void CPU_SRA(Instruction instr, u32 rtVal, u32 sh, bool is_variable);
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static void WriteMem(u32 addr, const PGXP_value& value);
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static void WriteMem16(u32 addr, const PGXP_value& value);
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@ -1321,12 +1324,9 @@ void CPU::PGXP::CPU_DIVU(Instruction instr, u32 rsVal, u32 rtVal)
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////////////////////////////////////
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// Shift operations (sa)
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////////////////////////////////////
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void CPU::PGXP::CPU_SLL(Instruction instr, u32 rtVal)
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{
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LOG_VALUES_C1(instr.r.rt.GetValue(), rtVal);
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// Rd = Rt << Sa
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const u32 sh = instr.r.shamt;
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ALWAYS_INLINE_RELEASE void CPU::PGXP::CPU_SLL(Instruction instr, u32 rtVal, u32 sh)
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{
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const u32 rdVal = rtVal << sh;
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PGXP_value& prtVal = ValidateAndGetRtValue(instr, rtVal);
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@ -1366,12 +1366,26 @@ void CPU::PGXP::CPU_SLL(Instruction instr, u32 rtVal)
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prdVal.flags |= VALID_TAINTED_Z;
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}
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void CPU::PGXP::CPU_SRL(Instruction instr, u32 rtVal)
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void CPU::PGXP::CPU_SLL(Instruction instr, u32 rtVal)
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{
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LOG_VALUES_C1(instr.r.rt.GetValue(), rtVal);
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// Rd = Rt >> Sa
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// Rd = Rt << Sa
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const u32 sh = instr.r.shamt;
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CPU_SLL(instr, rtVal, sh);
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}
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void CPU::PGXP::CPU_SLLV(Instruction instr, u32 rtVal, u32 rsVal)
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{
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LOG_VALUES_C2(instr.r.rt.GetValue(), rtVal, instr.r.rs.GetValue(), rsVal);
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// Rd = Rt << Rs
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const u32 sh = rsVal & 0x1F;
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CPU_SLL(instr, rtVal, sh);
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}
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ALWAYS_INLINE_RELEASE void CPU::PGXP::CPU_SRL(Instruction instr, u32 rtVal, u32 sh)
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{
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const u32 rdVal = rtVal >> sh;
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PGXP_value& prtVal = ValidateAndGetRtValue(instr, rtVal);
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@ -1413,23 +1427,34 @@ void CPU::PGXP::CPU_SRL(Instruction instr, u32 rtVal)
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else
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y = y / static_cast<float>(1 << sh);
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x = f16Sign(x);
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y = f16Sign(y);
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PGXP_value& prdVal = GetRdValue(instr);
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prdVal = prtVal;
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prdVal.x = static_cast<float>(x);
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prdVal.y = static_cast<float>(y);
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prdVal.x = static_cast<float>(f16Sign(x));
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prdVal.y = static_cast<float>(f16Sign(y));
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prdVal.value = rdVal;
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prdVal.flags |= VALID_TAINTED_Z;
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}
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void CPU::PGXP::CPU_SRA(Instruction instr, u32 rtVal)
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void CPU::PGXP::CPU_SRL(Instruction instr, u32 rtVal)
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{
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LOG_VALUES_C1(instr.r.rt.GetValue(), rtVal);
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// Rd = Rt >> Sa
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const u32 sh = instr.r.shamt;
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CPU_SRL(instr, rtVal, sh);
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}
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void CPU::PGXP::CPU_SRLV(Instruction instr, u32 rtVal, u32 rsVal)
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{
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LOG_VALUES_C2(instr.r.rt.GetValue(), rtVal, instr.r.rs.GetValue(), rsVal);
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// Rd = Rt >> Sa
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const u32 sh = rsVal & 0x1F;
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CPU_SRL(instr, rtVal, sh);
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}
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void CPU::PGXP::CPU_SRA(Instruction instr, u32 rtVal, u32 sh, bool is_variable)
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{
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const u32 rdVal = static_cast<u32>(static_cast<s32>(rtVal) >> sh);
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PGXP_value& prtVal = ValidateAndGetRtValue(instr, rtVal);
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@ -1485,115 +1510,20 @@ void CPU::PGXP::CPU_SRA(Instruction instr, u32 rtVal)
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// and it's not originally from a 3D value. Too many false positives in P2/etc.
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// What we probably should do is not set the valid flag on non-3D values to begin
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// with, only letting them become valid when used in another expression.
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if (!(prdVal.flags & VALID_Z) && sh < 16)
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if (!is_variable && !(prdVal.flags & VALID_Z) && sh < 16)
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{
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prdVal.flags = 0;
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MakeValid(&prdVal, rdVal);
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}
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}
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////////////////////////////////////
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// Shift operations variable
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////////////////////////////////////
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void CPU::PGXP::CPU_SLLV(Instruction instr, u32 rtVal, u32 rsVal)
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void CPU::PGXP::CPU_SRA(Instruction instr, u32 rtVal)
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{
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LOG_VALUES_C2(instr.r.rt.GetValue(), rtVal, instr.r.rs.GetValue(), rsVal);
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// Rd = Rt << Rs
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const u32 rdVal = rtVal << rsVal;
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const u32 sh = rsVal & 0x1F;
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PGXP_value& prtVal = ValidateAndGetRtValue(instr, rtVal);
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[[maybe_unused]] PGXP_value& prsVal = ValidateAndGetRsValue(instr, rsVal); // TODO: Remove me
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double x = f16Unsign(prtVal.x);
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double y = f16Unsign(prtVal.y);
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if (sh >= 32)
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{
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x = 0.f;
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y = 0.f;
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}
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else if (sh == 16)
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{
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y = f16Sign(x);
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x = 0.f;
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}
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else if (sh >= 16)
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{
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y = x * (1 << (sh - 16));
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y = f16Sign(y);
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x = 0.f;
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}
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else
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{
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x = x * (1 << sh);
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y = y * (1 << sh);
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y += f16Overflow(x);
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x = f16Sign(x);
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y = f16Sign(y);
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}
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PGXP_value& prdVal = GetRdValue(instr);
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prdVal = prtVal;
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prdVal.x = static_cast<float>(x);
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prdVal.y = static_cast<float>(y);
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prdVal.value = rdVal;
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prdVal.flags |= VALID_TAINTED_Z;
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}
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void CPU::PGXP::CPU_SRLV(Instruction instr, u32 rtVal, u32 rsVal)
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{
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LOG_VALUES_C2(instr.r.rt.GetValue(), rtVal, instr.r.rs.GetValue(), rsVal);
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LOG_VALUES_C1(instr.r.rt.GetValue(), rtVal);
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// Rd = Rt >> Sa
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const u32 rdVal = rtVal >> rsVal;
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const u32 sh = rsVal & 0x1F;
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PGXP_value& prtVal = ValidateAndGetRtValue(instr, rtVal);
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[[maybe_unused]] PGXP_value& prsVal = ValidateAndGetRsValue(instr, rsVal); // TODO: remove me
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double x = prtVal.x;
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double y = f16Unsign(prtVal.y);
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const u32 iX = SignExtend32(LOWORD_S16(rtVal)); // remove Y
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const u32 iY = SET_LOWORD(rtVal, HIWORD_U16(iX)); // overwrite x with sign(x)
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// Shift test values
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const u32 dX = static_cast<u32>(static_cast<s32>(iX) >> sh);
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const u32 dY = iY >> sh;
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if (LOWORD_S16(dX) != HIWORD_S16(iX))
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x = x / (1 << sh);
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else
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x = LOWORD_S16(dX); // only sign bits left
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if (LOWORD_S16(dY) != HIWORD_S16(iX))
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{
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if (sh == 16)
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{
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x = y;
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}
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else if (sh < 16)
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{
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x += y * (1 << (16 - sh));
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if (GetRtValue(instr).x < 0)
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x += 1 << (16 - sh);
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}
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else
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{
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x += y / (1 << (sh - 16));
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}
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}
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if ((HIWORD_S16(dY) == 0) || (HIWORD_S16(dY) == -1))
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y = HIWORD_S16(dY);
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else
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y = y / (1 << sh);
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PGXP_value& prdVal = GetRdValue(instr);
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prdVal = prtVal;
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prdVal.x = static_cast<float>(f16Sign(x));
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prdVal.y = static_cast<float>(f16Sign(y));
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prdVal.value = rdVal;
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prdVal.flags |= VALID_TAINTED_Z;
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const u32 sh = instr.r.shamt;
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CPU_SRA(instr, rtVal, sh, false);
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}
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void CPU::PGXP::CPU_SRAV(Instruction instr, u32 rtVal, u32 rsVal)
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@ -1601,55 +1531,8 @@ void CPU::PGXP::CPU_SRAV(Instruction instr, u32 rtVal, u32 rsVal)
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LOG_VALUES_C2(instr.r.rt.GetValue(), rtVal, instr.r.rs.GetValue(), rsVal);
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// Rd = Rt >> Sa
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const u32 rdVal = static_cast<u32>(static_cast<s32>(rtVal) >> rsVal);
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const u32 sh = rsVal & 0x1F;
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PGXP_value& prtVal = ValidateAndGetRtValue(instr, rtVal);
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[[maybe_unused]] PGXP_value& prsVal = ValidateAndGetRsValue(instr, rsVal); // TODO: remove me
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double x = prtVal.x;
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double y = prtVal.y;
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const u32 iX = SignExtend32(LOWORD_S16(rtVal)); // remove Y
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const u32 iY = SET_LOWORD(rtVal, HIWORD_U16(iX)); // overwrite x with sign(x)
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// Shift test values
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const u32 dX = static_cast<u32>(static_cast<s32>(iX) >> sh);
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const u32 dY = static_cast<u32>(static_cast<s32>(iY) >> sh);
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if (LOWORD_S16(dX) != HIWORD_S16(iX))
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x = x / (1 << sh);
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else
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x = LOWORD_S16(dX); // only sign bits left
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if (LOWORD_S16(dY) != HIWORD_S16(iX))
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{
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if (sh == 16)
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{
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x = y;
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}
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else if (sh < 16)
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{
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x += y * (1 << (16 - sh));
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if (GetRtValue(instr).x < 0)
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x += 1 << (16 - sh);
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}
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else
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{
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x += y / (1 << (sh - 16));
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}
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}
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if ((HIWORD_S16(dY) == 0) || (HIWORD_S16(dY) == -1))
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y = HIWORD_S16(dY);
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else
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y = y / (1 << sh);
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PGXP_value& prdVal = GetRdValue(instr);
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prdVal = prtVal;
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prdVal.x = static_cast<float>(f16Sign(x));
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prdVal.y = static_cast<float>(f16Sign(y));
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prdVal.value = rdVal;
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prdVal.flags |= VALID_TAINTED_Z;
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CPU_SRA(instr, rtVal, sh, true);
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}
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void CPU::PGXP::CPU_MFC0(Instruction instr, u32 rdVal)
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