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CPU/Recompiler: Detect move instructions and forward to PGXP
Fixes holes in polygons in Gran Turismo 1 + 2 with PGXP enabled.
This commit is contained in:
parent
0b858658ca
commit
8a91395566
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@ -1301,6 +1301,7 @@ bool CodeGenerator::Compile_Add(const CodeBlockInstruction& cbi)
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(cbi.instruction.op == InstructionOp::funct && cbi.instruction.r.funct == InstructionFunct::add));
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(cbi.instruction.op == InstructionOp::funct && cbi.instruction.r.funct == InstructionFunct::add));
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Value lhs, rhs;
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Value lhs, rhs;
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Reg lhs_src;
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Reg dest;
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Reg dest;
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switch (cbi.instruction.op)
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switch (cbi.instruction.op)
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{
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{
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@ -1309,6 +1310,7 @@ bool CodeGenerator::Compile_Add(const CodeBlockInstruction& cbi)
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{
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{
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// rt <- rs + sext(imm)
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// rt <- rs + sext(imm)
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dest = cbi.instruction.i.rt;
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dest = cbi.instruction.i.rt;
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lhs_src = cbi.instruction.i.rs;
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lhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rs);
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lhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rs);
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rhs = Value::FromConstantU32(cbi.instruction.i.imm_sext32());
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rhs = Value::FromConstantU32(cbi.instruction.i.imm_sext32());
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}
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}
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@ -1318,6 +1320,7 @@ bool CodeGenerator::Compile_Add(const CodeBlockInstruction& cbi)
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{
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{
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Assert(cbi.instruction.r.funct == InstructionFunct::add || cbi.instruction.r.funct == InstructionFunct::addu);
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Assert(cbi.instruction.r.funct == InstructionFunct::add || cbi.instruction.r.funct == InstructionFunct::addu);
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dest = cbi.instruction.r.rd;
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dest = cbi.instruction.r.rd;
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lhs_src = cbi.instruction.r.rs;
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lhs = m_register_cache.ReadGuestRegister(cbi.instruction.r.rs);
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lhs = m_register_cache.ReadGuestRegister(cbi.instruction.r.rs);
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rhs = m_register_cache.ReadGuestRegister(cbi.instruction.r.rt);
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rhs = m_register_cache.ReadGuestRegister(cbi.instruction.r.rt);
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}
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}
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@ -1328,6 +1331,13 @@ bool CodeGenerator::Compile_Add(const CodeBlockInstruction& cbi)
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return false;
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return false;
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}
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}
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// detect register moves and handle them for pgxp
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if (g_settings.gpu_pgxp_enable && rhs.HasConstantValue(0))
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{
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EmitFunctionCall(nullptr, &PGXP::CPU_MOVE,
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Value::FromConstantU32((static_cast<u32>(dest) << 8) | (static_cast<u32>(lhs_src))), lhs);
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}
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Value result = AddValues(lhs, rhs, check_overflow);
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Value result = AddValues(lhs, rhs, check_overflow);
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if (check_overflow)
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if (check_overflow)
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GenerateExceptionExit(cbi, Exception::Ov, Condition::Overflow);
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GenerateExceptionExit(cbi, Exception::Ov, Condition::Overflow);
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@ -870,6 +870,13 @@ void CPU_SW(u32 instr, u32 rtVal, u32 addr)
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WriteMem(&CPU_reg[rt(instr)], addr);
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WriteMem(&CPU_reg[rt(instr)], addr);
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}
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}
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void CPU_MOVE(u32 rd_and_rs, u32 rsVal)
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{
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const u32 Rs = (rd_and_rs & 0xFFu);
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Validate(&CPU_reg[Rs], rsVal);
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CPU_reg[(rd_and_rs >> 8)] = CPU_reg[Rs];
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}
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void CPU_ADDI(u32 instr, u32 rtVal, u32 rsVal)
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void CPU_ADDI(u32 instr, u32 rtVal, u32 rsVal)
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{
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{
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// Rt = Rs + Imm (signed)
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// Rt = Rs + Imm (signed)
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@ -52,6 +52,7 @@ void CPU_LBx(u32 instr, u32 rtVal, u32 addr);
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void CPU_SB(u32 instr, u8 rtVal, u32 addr);
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void CPU_SB(u32 instr, u8 rtVal, u32 addr);
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void CPU_SH(u32 instr, u16 rtVal, u32 addr);
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void CPU_SH(u32 instr, u16 rtVal, u32 addr);
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void CPU_SW(u32 instr, u32 rtVal, u32 addr);
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void CPU_SW(u32 instr, u32 rtVal, u32 addr);
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void CPU_MOVE(u32 rd_and_rs, u32 rsVal);
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// Arithmetic with immediate value
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// Arithmetic with immediate value
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void CPU_ADDI(u32 instr, u32 rtVal, u32 rsVal);
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void CPU_ADDI(u32 instr, u32 rtVal, u32 rsVal);
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