diff --git a/src/core/cpu_core.cpp b/src/core/cpu_core.cpp index cb92a8799..b4947af09 100644 --- a/src/core/cpu_core.cpp +++ b/src/core/cpu_core.cpp @@ -1461,7 +1461,8 @@ template void InterpretCachedBlock(const CodeBlock& block); void InterpretUncachedBlock() { - Panic("Fixme with regards to re-fetching PC"); + g_state.regs.npc = g_state.regs.pc; + FetchInstruction(); // At this point, pc contains the last address executed (in the previous block). The instruction has not been fetched // yet. pc shouldn't be updated until the fetch occurs, that way the exception occurs in the delay slot. @@ -1480,8 +1481,15 @@ void InterpretUncachedBlock() g_state.exception_raised = false; // Fetch the next instruction, except if we're in a branch delay slot. The "fetch" is done in the next block. - if (!FetchInstruction()) - break; + if (!g_state.current_instruction_in_branch_delay_slot) + { + if (!FetchInstruction()) + break; + } + else + { + g_state.regs.pc = g_state.regs.npc; + } // execute the instruction we previously fetched ExecuteInstruction();