CPU: Simplify some exception checks in cop0-3

This commit is contained in:
Connor McLaughlin 2020-08-07 17:05:01 +10:00
parent 80be38b7c8
commit a2f271c505
2 changed files with 9 additions and 9 deletions

View file

@ -1152,9 +1152,9 @@ void ExecuteInstruction()
case InstructionOp::cop2:
{
if (InUserMode() && !g_state.cop0_regs.sr.CU2)
if (!g_state.cop0_regs.sr.CE2)
{
Log_WarningPrintf("Coprocessor 2 not present in user mode");
Log_WarningPrintf("Coprocessor 2 not enabled");
RaiseException(Exception::CpU);
return;
}
@ -1165,9 +1165,9 @@ void ExecuteInstruction()
case InstructionOp::lwc2:
{
if (InUserMode() && !g_state.cop0_regs.sr.CU2)
if (!g_state.cop0_regs.sr.CE2)
{
Log_WarningPrintf("Coprocessor 2 not present in user mode");
Log_WarningPrintf("Coprocessor 2 not enabled");
RaiseException(Exception::CpU);
return;
}
@ -1186,9 +1186,9 @@ void ExecuteInstruction()
case InstructionOp::swc2:
{
if (InUserMode() && !g_state.cop0_regs.sr.CU2)
if (!g_state.cop0_regs.sr.CE2)
{
Log_WarningPrintf("Coprocessor 2 not present in user mode");
Log_WarningPrintf("Coprocessor 2 not enabled");
RaiseException(Exception::CpU);
return;
}

View file

@ -332,9 +332,9 @@ struct Cop0Registers
BitField<u32, bool, 22, 1> BEV; // boot exception vectors, 0 = KSEG0, 1 = KSEG1
BitField<u32, bool, 25, 1> RE; // reverse endianness in user mode
BitField<u32, bool, 28, 1> CU0; // coprocessor 0 enable in user mode
BitField<u32, bool, 29, 1> CU1; // coprocessor 1 enable in user mode
BitField<u32, bool, 30, 1> CU2; // coprocessor 2 enable in user mode
BitField<u32, bool, 31, 1> CU3; // coprocessor 3 enable in user mode
BitField<u32, bool, 29, 1> CE1; // coprocessor 1 enable
BitField<u32, bool, 30, 1> CE2; // coprocessor 2 enable
BitField<u32, bool, 31, 1> CE3; // coprocessor 3 enable
BitField<u32, u8, 0, 6> mode_bits;
BitField<u32, u8, 28, 2> coprocessor_enable_mask;