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CPU: Simplify some exception checks in cop0-3
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@ -1152,9 +1152,9 @@ void ExecuteInstruction()
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case InstructionOp::cop2:
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{
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if (InUserMode() && !g_state.cop0_regs.sr.CU2)
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if (!g_state.cop0_regs.sr.CE2)
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{
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Log_WarningPrintf("Coprocessor 2 not present in user mode");
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Log_WarningPrintf("Coprocessor 2 not enabled");
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RaiseException(Exception::CpU);
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return;
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}
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@ -1165,9 +1165,9 @@ void ExecuteInstruction()
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case InstructionOp::lwc2:
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{
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if (InUserMode() && !g_state.cop0_regs.sr.CU2)
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if (!g_state.cop0_regs.sr.CE2)
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{
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Log_WarningPrintf("Coprocessor 2 not present in user mode");
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Log_WarningPrintf("Coprocessor 2 not enabled");
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RaiseException(Exception::CpU);
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return;
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}
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@ -1186,9 +1186,9 @@ void ExecuteInstruction()
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case InstructionOp::swc2:
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{
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if (InUserMode() && !g_state.cop0_regs.sr.CU2)
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if (!g_state.cop0_regs.sr.CE2)
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{
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Log_WarningPrintf("Coprocessor 2 not present in user mode");
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Log_WarningPrintf("Coprocessor 2 not enabled");
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RaiseException(Exception::CpU);
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return;
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}
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@ -332,9 +332,9 @@ struct Cop0Registers
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BitField<u32, bool, 22, 1> BEV; // boot exception vectors, 0 = KSEG0, 1 = KSEG1
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BitField<u32, bool, 25, 1> RE; // reverse endianness in user mode
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BitField<u32, bool, 28, 1> CU0; // coprocessor 0 enable in user mode
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BitField<u32, bool, 29, 1> CU1; // coprocessor 1 enable in user mode
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BitField<u32, bool, 30, 1> CU2; // coprocessor 2 enable in user mode
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BitField<u32, bool, 31, 1> CU3; // coprocessor 3 enable in user mode
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BitField<u32, bool, 29, 1> CE1; // coprocessor 1 enable
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BitField<u32, bool, 30, 1> CE2; // coprocessor 2 enable
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BitField<u32, bool, 31, 1> CE3; // coprocessor 3 enable
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BitField<u32, u8, 0, 6> mode_bits;
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BitField<u32, u8, 28, 2> coprocessor_enable_mask;
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