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CPU/CodeCache: Don't try to compile direct double branches
Invalidation nightmare.
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@ -973,9 +973,10 @@ bool CPU::CodeCache::ReadBlockInstructions(u32 start_pc, BlockInstructionList* i
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return false;
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return false;
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}
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}
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// change the pc for the second branch's delay slot, it comes from the first branch
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// we _could_ fetch the delay slot from the first branch's target, but it's probably in a different
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pc = GetDirectBranchTarget(prev.first, prev.second.pc);
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// page, and that's an invalidation nightmare. so just fallback to the int, this is very rare anyway.
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Log_DevPrintf("Double branch at %08X, using delay slot from %08X -> %08X", info.pc, prev.second.pc, pc);
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Log_WarningPrintf("Direct branch in delay slot at %08X, skipping block", info.pc);
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return false;
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}
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}
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// instruction is decoded now
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// instruction is decoded now
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