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GPU: Set idle bit during VRAM upload
Tenga Seiha does a bunch of completely-invalid VRAM writes on boot, then expects GPU idle to be set. It's unclear what actually happens, I need to write another test, but for now, just skip these uploads. Not setting GPU idle during the write command breaks Doom, so that's not an option.
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@ -445,22 +445,7 @@ void GPU::UpdateDMARequest()
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void GPU::UpdateGPUIdle()
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void GPU::UpdateGPUIdle()
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{
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{
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switch (m_blitter_state)
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m_GPUSTAT.gpu_idle = (m_blitter_state == BlitterState::Idle && m_pending_command_ticks <= 0 && m_fifo.IsEmpty());
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{
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case BlitterState::Idle:
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case BlitterState::DrawingPolyLine:
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m_GPUSTAT.gpu_idle = (m_pending_command_ticks <= 0 && m_fifo.IsEmpty());
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break;
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case BlitterState::WritingVRAM:
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case BlitterState::ReadingVRAM:
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m_GPUSTAT.gpu_idle = m_fifo.IsEmpty();
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break;
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default:
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UnreachableCode();
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break;
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}
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}
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}
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u32 GPU::ReadRegister(u32 offset)
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u32 GPU::ReadRegister(u32 offset)
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@ -479,10 +479,23 @@ bool GPU::HandleCopyRectangleCPUToVRAMCommand()
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CHECK_COMMAND_SIZE(3);
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CHECK_COMMAND_SIZE(3);
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m_fifo.RemoveOne();
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m_fifo.RemoveOne();
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const u32 dst_x = FifoPeek() & VRAM_WIDTH_MASK;
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const u32 coords = FifoPop();
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const u32 dst_y = (FifoPop() >> 16) & VRAM_HEIGHT_MASK;
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const u32 size = FifoPop();
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const u32 copy_width = ReplaceZero(FifoPeek() & VRAM_WIDTH_MASK, 0x400);
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const u32 copy_height = ReplaceZero((FifoPop() >> 16) & VRAM_HEIGHT_MASK, 0x200);
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// Tenga Seiha does a bunch of completely-invalid VRAM writes on boot, then expects GPU idle to be set.
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// It's unclear what actually happens, I need to write another test, but for now, just skip these uploads.
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// Not setting GPU idle during the write command breaks Doom, so that's not an option.
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if (size == 0xFFFFFFFFu) [[unlikely]]
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{
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ERROR_LOG("Ignoring likely-invalid VRAM write to ({},{})", (coords & VRAM_WIDTH_MASK),
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((coords >> 16) & VRAM_HEIGHT_MASK));
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return true;
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}
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const u32 dst_x = coords & VRAM_WIDTH_MASK;
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const u32 dst_y = (coords >> 16) & VRAM_HEIGHT_MASK;
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const u32 copy_width = ReplaceZero(size & VRAM_WIDTH_MASK, 0x400);
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const u32 copy_height = ReplaceZero((size >> 16) & VRAM_HEIGHT_MASK, 0x200);
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const u32 num_pixels = copy_width * copy_height;
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const u32 num_pixels = copy_width * copy_height;
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const u32 num_words = ((num_pixels + 1) / 2);
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const u32 num_words = ((num_pixels + 1) / 2);
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