mirror of
https://github.com/RetroDECK/Duckstation.git
synced 2024-09-17 08:02:41 +00:00
GTE: Implement CC
This commit is contained in:
Connor McLaughlin
parent
13389caa60
commit
b133f96c24
214
src/core/gte.cpp
214
src/core/gte.cpp
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@ -294,6 +294,10 @@ void Core::ExecuteInstruction(Instruction inst)
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Execute_NCCS(inst);
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break;
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case 0x1C:
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Execute_CC(inst);
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break;
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case 0x1E:
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Execute_NCS(inst);
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break;
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@ -424,6 +428,110 @@ void Core::PushRGBFromMAC()
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m_regs.RGBC[3]);
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}
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void Core::MulMatVec(const s16 M[3][3], const s16 Vx, const s16 Vy, const s16 Vz, u8 shift, bool lm)
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{
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#define dot3(i) \
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TruncateAndSetMACAndIR<i + 1>(SignExtendMACResult<i + 1>((s64(M[i][0]) * s64(Vx)) + (s64(M[i][1]) * s64(Vy))) + \
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(s64(M[i][2]) * s64(Vz)), \
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shift, lm)
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dot3(0);
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dot3(1);
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dot3(2);
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#undef dot3
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}
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void Core::MulMatVec(const s16 M[3][3], const s32 T[3], const s16 Vx, const s16 Vy, const s16 Vz, u8 shift, bool lm)
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{
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#define dot3(i) \
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TruncateAndSetMACAndIR<i + 1>( \
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SignExtendMACResult<i + 1>(SignExtendMACResult<i + 1>((s64(T[i]) << 12) + (s64(M[i][0]) * s64(Vx))) + \
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(s64(M[i][1]) * s64(Vy))) + \
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(s64(M[i][2]) * s64(Vz)), \
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shift, lm)
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dot3(0);
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dot3(1);
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dot3(2);
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#undef dot3
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}
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void Core::Execute_MVMVA(Instruction inst)
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{
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m_regs.FLAG.Clear();
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// TODO: Remove memcpy..
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s16 M[3][3];
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switch (inst.mvmva_multiply_matrix)
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{
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case 0:
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std::memcpy(M, m_regs.RT, sizeof(s16) * 3 * 3);
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break;
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case 1:
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std::memcpy(M, m_regs.LLM, sizeof(s16) * 3 * 3);
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break;
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case 2:
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std::memcpy(M, m_regs.LCM, sizeof(s16) * 3 * 3);
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break;
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default:
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// buggy
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Panic("Missing implementation");
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return;
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}
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s16 Vx, Vy, Vz;
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switch (inst.mvmva_multiply_vector)
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{
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case 0:
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Vx = m_regs.V0[0];
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Vy = m_regs.V0[1];
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Vz = m_regs.V0[2];
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break;
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case 1:
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Vx = m_regs.V1[0];
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Vy = m_regs.V1[1];
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Vz = m_regs.V1[2];
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break;
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case 2:
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Vx = m_regs.V2[0];
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Vy = m_regs.V2[1];
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Vz = m_regs.V2[2];
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break;
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default:
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Vx = m_regs.IR1;
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Vy = m_regs.IR2;
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Vz = m_regs.IR3;
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break;
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}
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s32 T[3];
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switch (inst.mvmva_translation_vector)
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{
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case 0:
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std::memcpy(T, m_regs.TR, sizeof(T));
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break;
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case 1:
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std::memcpy(T, m_regs.BK, sizeof(T));
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break;
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case 2:
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// buggy
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std::memcpy(T, m_regs.FC, sizeof(T));
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break;
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case 3:
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std::fill_n(T, countof(T), s32(0));
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break;
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default:
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Panic("Missing implementation");
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return;
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}
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MulMatVec(M, T, Vx, Vy, Vz, inst.GetShift(), inst.lm);
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m_regs.FLAG.UpdateError();
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}
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void Core::RTPS(const s16 V[3], bool sf, bool lm, bool last)
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{
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const u8 shift = sf ? 12 : 0;
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@ -562,36 +670,6 @@ void Core::Execute_AVSZ4(Instruction inst)
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m_regs.FLAG.UpdateError();
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}
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void Core::MulMatVec(const s16 M[3][3], const s16 Vx, const s16 Vy, const s16 Vz, u8 shift, bool lm)
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{
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#define dot3(i) \
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TruncateAndSetMACAndIR<i + 1>(SignExtendMACResult<i + 1>((s64(M[i][0]) * s64(Vx)) + (s64(M[i][1]) * s64(Vy))) + \
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(s64(M[i][2]) * s64(Vz)), \
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shift, lm)
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dot3(0);
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dot3(1);
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dot3(2);
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#undef dot3
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}
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void Core::MulMatVec(const s16 M[3][3], const s32 T[3], const s16 Vx, const s16 Vy, const s16 Vz, u8 shift, bool lm)
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{
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#define dot3(i) \
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TruncateAndSetMACAndIR<i + 1>( \
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SignExtendMACResult<i + 1>(SignExtendMACResult<i + 1>((s64(T[i]) << 12) + (s64(M[i][0]) * s64(Vx))) + \
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(s64(M[i][1]) * s64(Vy))) + \
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(s64(M[i][2]) * s64(Vz)), \
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shift, lm)
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dot3(0);
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dot3(1);
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dot3(2);
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#undef dot3
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}
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void Core::InterpolateColor(s64 in_MAC1, s64 in_MAC2, s64 in_MAC3, u8 shift, bool lm)
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{
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// [MAC1,MAC2,MAC3] = MAC+(FC-MAC)*IR0
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@ -727,76 +805,24 @@ void Core::Execute_NCDT(Instruction inst)
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m_regs.FLAG.UpdateError();
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}
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void Core::Execute_MVMVA(Instruction inst)
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void Core::Execute_CC(Instruction inst)
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{
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m_regs.FLAG.Clear();
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// TODO: Remove memcpy..
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s16 M[3][3];
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switch (inst.mvmva_multiply_matrix)
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{
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case 0:
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std::memcpy(M, m_regs.RT, sizeof(s16) * 3 * 3);
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break;
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case 1:
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std::memcpy(M, m_regs.LLM, sizeof(s16) * 3 * 3);
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break;
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case 2:
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std::memcpy(M, m_regs.LCM, sizeof(s16) * 3 * 3);
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break;
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default:
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// buggy
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Panic("Missing implementation");
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return;
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}
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const u8 shift = inst.GetShift();
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const bool lm = inst.lm;
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s16 Vx, Vy, Vz;
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switch (inst.mvmva_multiply_vector)
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{
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case 0:
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Vx = m_regs.V0[0];
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Vy = m_regs.V0[1];
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Vz = m_regs.V0[2];
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break;
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case 1:
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Vx = m_regs.V1[0];
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Vy = m_regs.V1[1];
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Vz = m_regs.V1[2];
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break;
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case 2:
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Vx = m_regs.V2[0];
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Vy = m_regs.V2[1];
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Vz = m_regs.V2[2];
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break;
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default:
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Vx = m_regs.IR1;
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Vy = m_regs.IR2;
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Vz = m_regs.IR3;
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break;
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}
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// [IR1,IR2,IR3] = [MAC1,MAC2,MAC3] = (BK*1000h + LCM*IR) SAR (sf*12)
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MulMatVec(m_regs.LCM, m_regs.BK, m_regs.IR1, m_regs.IR2, m_regs.IR3, shift, lm);
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s32 T[3];
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switch (inst.mvmva_translation_vector)
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{
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case 0:
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std::memcpy(T, m_regs.TR, sizeof(T));
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break;
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case 1:
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std::memcpy(T, m_regs.BK, sizeof(T));
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break;
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case 2:
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// buggy
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std::memcpy(T, m_regs.FC, sizeof(T));
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break;
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case 3:
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std::fill_n(T, countof(T), s32(0));
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break;
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default:
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Panic("Missing implementation");
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return;
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}
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// [MAC1,MAC2,MAC3] = [R*IR1,G*IR2,B*IR3] SHL 4
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// [MAC1,MAC2,MAC3] = [MAC1,MAC2,MAC3] SAR (sf*12)
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TruncateAndSetMACAndIR<1>(s64(s32(ZeroExtend32(m_regs.RGBC[0])) * s32(m_regs.IR1)) << 4, shift, lm);
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TruncateAndSetMACAndIR<2>(s64(s32(ZeroExtend32(m_regs.RGBC[1])) * s32(m_regs.IR2)) << 4, shift, lm);
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TruncateAndSetMACAndIR<3>(s64(s32(ZeroExtend32(m_regs.RGBC[2])) * s32(m_regs.IR3)) << 4, shift, lm);
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MulMatVec(M, T, Vx, Vy, Vz, inst.GetShift(), inst.lm);
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// Color FIFO = [MAC1/16,MAC2/16,MAC3/16,CODE], [IR1,IR2,IR3] = [MAC1,MAC2,MAC3]
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PushRGBFromMAC();
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m_regs.FLAG.UpdateError();
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}
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@ -76,6 +76,7 @@ private:
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void NCDS(const s16 V[3], u8 shift, bool lm);
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void DPCS(const u8 color[3], u8 shift, bool lm);
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void Execute_MVMVA(Instruction inst);
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void Execute_RTPS(Instruction inst);
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void Execute_RTPT(Instruction inst);
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void Execute_NCLIP(Instruction inst);
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@ -88,7 +89,7 @@ private:
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void Execute_NCCT(Instruction inst);
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void Execute_NCDS(Instruction inst);
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void Execute_NCDT(Instruction inst);
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void Execute_MVMVA(Instruction inst);
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void Execute_CC(Instruction inst);
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void Execute_DPCS(Instruction inst);
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void Execute_DPCT(Instruction inst);
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void Execute_DCPL(Instruction inst);
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