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CPU/NewRec/RV64: Compile fix
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parent
487eb102b7
commit
c02bf0f662
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@ -2,10 +2,6 @@
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// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
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// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
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#include "cpu_newrec_compiler_riscv64.h"
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#include "cpu_newrec_compiler_riscv64.h"
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#include "common/align.h"
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#include "common/assert.h"
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#include "common/log.h"
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#include "common/string_util.h"
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#include "cpu_code_cache_private.h"
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#include "cpu_code_cache_private.h"
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#include "cpu_core_private.h"
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#include "cpu_core_private.h"
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#include "cpu_pgxp.h"
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#include "cpu_pgxp.h"
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@ -13,6 +9,13 @@
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#include "gte.h"
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#include "gte.h"
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#include "settings.h"
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#include "settings.h"
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#include "timing_event.h"
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#include "timing_event.h"
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#include "common/align.h"
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#include "common/assert.h"
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#include "common/log.h"
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#include "common/memmap.h"
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#include "common/string_util.h"
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#include <limits>
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#include <limits>
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#ifdef CPU_ARCH_RISCV64
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#ifdef CPU_ARCH_RISCV64
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@ -304,7 +307,7 @@ u32 CPU::CodeCache::EmitJump(void* code, const void* dst, bool flush_icache)
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}
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}
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if (flush_icache)
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if (flush_icache)
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JitCodeBuffer::FlushInstructionCache(code, BLOCK_LINK_SIZE);
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MemMap::FlushInstructionCache(code, BLOCK_LINK_SIZE);
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return BLOCK_LINK_SIZE;
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return BLOCK_LINK_SIZE;
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}
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}
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