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https://github.com/RetroDECK/Duckstation.git
synced 2024-11-23 14:25:37 +00:00
CPU: Move interrupt check out of inner-most exec loop
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0afdc04d88
commit
cb351a7dbd
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@ -132,18 +132,17 @@ static void ExecuteImpl()
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g_state.frame_done = false;
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while (!g_state.frame_done)
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{
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if (HasPendingInterrupt())
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{
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SafeReadInstruction(g_state.regs.pc, &g_state.next_instruction.bits);
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DispatchInterrupt();
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}
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TimingEvents::UpdateCPUDowncount();
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next_block_key = GetNextBlockKey();
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while (g_state.pending_ticks < g_state.downcount)
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{
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if (HasPendingInterrupt())
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{
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SafeReadInstruction(g_state.regs.pc, &g_state.next_instruction.bits);
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DispatchInterrupt();
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next_block_key = GetNextBlockKey();
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}
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CodeBlock* block = LookupBlock(next_block_key);
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if (!block)
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{
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@ -153,6 +152,7 @@ static void ExecuteImpl()
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}
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reexecute_block:
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Assert(!(HasPendingInterrupt()));
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#if 0
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const u32 tick = TimingEvents::GetGlobalTickCounter() + CPU::GetPendingTicks();
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@ -171,7 +171,7 @@ static void ExecuteImpl()
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if (g_state.pending_ticks >= g_state.downcount)
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break;
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else if (HasPendingInterrupt() || !USE_BLOCK_LINKING)
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else if (!USE_BLOCK_LINKING)
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continue;
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next_block_key = GetNextBlockKey();
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@ -242,10 +242,6 @@ void ExecuteRecompiler()
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{
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g_state.frame_done = false;
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while (!g_state.frame_done)
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{
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TimingEvents::UpdateCPUDowncount();
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while (g_state.pending_ticks < g_state.downcount)
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{
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if (HasPendingInterrupt())
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{
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@ -253,6 +249,10 @@ void ExecuteRecompiler()
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DispatchInterrupt();
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}
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TimingEvents::UpdateCPUDowncount();
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while (g_state.pending_ticks < g_state.downcount)
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{
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const u32 pc = g_state.regs.pc;
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g_state.current_instruction_pc = pc;
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const u32 fast_map_index = GetFastMapIndex(pc);
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@ -229,8 +229,17 @@ void RaiseException(u32 CAUSE_bits, u32 EPC)
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void SetExternalInterrupt(u8 bit)
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{
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g_state.cop0_regs.cause.Ip |= static_cast<u8>(1u << bit);
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if (g_settings.cpu_execution_mode == CPUExecutionMode::Interpreter)
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{
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g_state.interrupt_delay = 1;
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}
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else
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{
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g_state.interrupt_delay = 0;
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CheckForPendingInterrupt();
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}
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}
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void ClearExternalInterrupt(u8 bit)
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{
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@ -395,6 +404,7 @@ ALWAYS_INLINE_RELEASE static void WriteCop0Reg(Cop0Reg reg, u32 value)
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g_state.cop0_regs.sr.bits =
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(g_state.cop0_regs.sr.bits & ~Cop0Registers::SR::WRITE_MASK) | (value & Cop0Registers::SR::WRITE_MASK);
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Log_DebugPrintf("COP0 SR <- %08X (now %08X)", value, g_state.cop0_regs.sr.bits);
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CheckForPendingInterrupt();
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}
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break;
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@ -403,6 +413,7 @@ ALWAYS_INLINE_RELEASE static void WriteCop0Reg(Cop0Reg reg, u32 value)
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g_state.cop0_regs.cause.bits =
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(g_state.cop0_regs.cause.bits & ~Cop0Registers::CAUSE::WRITE_MASK) | (value & Cop0Registers::CAUSE::WRITE_MASK);
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Log_DebugPrintf("COP0 CAUSE <- %08X (now %08X)", value, g_state.cop0_regs.cause.bits);
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CheckForPendingInterrupt();
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}
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break;
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@ -1216,6 +1227,7 @@ restart_instruction:
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// restore mode
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g_state.cop0_regs.sr.mode_bits =
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(g_state.cop0_regs.sr.mode_bits & UINT32_C(0b110000)) | (g_state.cop0_regs.sr.mode_bits >> 2);
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CheckForPendingInterrupt();
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}
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break;
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@ -1365,6 +1377,20 @@ restart_instruction:
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}
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}
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void DispatchInterrupt()
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{
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// If the instruction we're about to execute is a GTE instruction, delay dispatching the interrupt until the next
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// instruction. For some reason, if we don't do this, we end up with incorrectly sorted polygons and flickering..
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if (g_state.next_instruction.op == InstructionOp::cop2 && !g_state.next_instruction.cop.IsCommonInstruction())
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GTE::ExecuteInstruction(g_state.next_instruction.bits);
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// Interrupt raising occurs before the start of the instruction.
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RaiseException(
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Cop0Registers::CAUSE::MakeValueForException(Exception::INT, g_state.next_instruction_is_branch_delay_slot,
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g_state.branch_was_taken, g_state.next_instruction.cop.cop_n),
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g_state.regs.pc);
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}
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template<PGXPMode pgxp_mode>
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static void ExecuteImpl()
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{
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@ -1375,9 +1401,10 @@ static void ExecuteImpl()
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while (g_state.pending_ticks < g_state.downcount)
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{
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if (HasPendingInterrupt())
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if (HasPendingInterrupt() && !g_state.interrupt_delay)
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DispatchInterrupt();
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g_state.interrupt_delay = false;
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g_state.pending_ticks++;
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// now executing the instruction we previously fetched
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@ -8,33 +8,20 @@ namespace CPU {
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void RaiseException(Exception excode);
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void RaiseException(u32 CAUSE_bits, u32 EPC);
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ALWAYS_INLINE static bool HasPendingInterrupt()
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ALWAYS_INLINE bool HasPendingInterrupt()
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{
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// const bool do_interrupt = g_state.m_cop0_regs.sr.IEc && ((g_state.m_cop0_regs.cause.Ip & g_state.m_cop0_regs.sr.Im)
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// != 0);
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const bool do_interrupt = g_state.cop0_regs.sr.IEc &&
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return g_state.cop0_regs.sr.IEc &&
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(((g_state.cop0_regs.cause.bits & g_state.cop0_regs.sr.bits) & (UINT32_C(0xFF) << 8)) != 0);
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const bool interrupt_delay = g_state.interrupt_delay;
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g_state.interrupt_delay = false;
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return do_interrupt && !interrupt_delay;
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}
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ALWAYS_INLINE static void DispatchInterrupt()
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ALWAYS_INLINE void CheckForPendingInterrupt()
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{
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// If the instruction we're about to execute is a GTE instruction, delay dispatching the interrupt until the next
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// instruction. For some reason, if we don't do this, we end up with incorrectly sorted polygons and flickering..
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if (g_state.next_instruction.IsCop2Instruction())
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return;
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// Interrupt raising occurs before the start of the instruction.
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RaiseException(
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Cop0Registers::CAUSE::MakeValueForException(Exception::INT, g_state.next_instruction_is_branch_delay_slot,
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g_state.branch_was_taken, g_state.next_instruction.cop.cop_n),
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g_state.regs.pc);
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if (HasPendingInterrupt())
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g_state.downcount = 0;
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}
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void DispatchInterrupt();
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// icache stuff
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ALWAYS_INLINE bool IsCachedAddress(VirtualMemoryAddress address)
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{
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@ -1930,21 +1930,8 @@ bool CodeGenerator::Compile_cop0(const CodeBlockInstruction& cbi)
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EmitBranchIfBitClear(sr_value.host_reg, sr_value.size, 0, &no_interrupt);
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EmitAnd(sr_value.host_reg, sr_value.host_reg, cause_value);
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EmitTest(sr_value.host_reg, Value::FromConstantU32(0xFF00));
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sr_value.ReleaseAndClear();
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cause_value.ReleaseAndClear();
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EmitConditionalBranch(Condition::Zero, false, &no_interrupt);
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EmitBranch(GetCurrentFarCodePointer());
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SwitchToFarCode();
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// we want to flush pc here
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m_register_cache.PushState();
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m_register_cache.FlushAllGuestRegisters(false, true);
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WriteNewPC(CalculatePC(), false);
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EmitExceptionExit();
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m_register_cache.PopState();
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SwitchToNearCode();
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EmitStoreCPUStructField(offsetof(State, downcount), Value::FromConstantU32(0));
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EmitBindLabel(&no_interrupt);
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}
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@ -1979,6 +1966,16 @@ bool CodeGenerator::Compile_cop0(const CodeBlockInstruction& cbi)
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EmitStoreCPUStructField(offsetof(State, cop0_regs.sr.bits), sr);
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Value cause_value = m_register_cache.AllocateScratch(RegSize_32);
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EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, offsetof(State, cop0_regs.cause.bits));
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LabelType no_interrupt;
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EmitAnd(sr.host_reg, sr.host_reg, cause_value);
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EmitTest(sr.host_reg, Value::FromConstantU32(0xFF00));
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EmitConditionalBranch(Condition::Zero, false, &no_interrupt);
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EmitStoreCPUStructField(offsetof(State, downcount), Value::FromConstantU32(0));
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EmitBindLabel(&no_interrupt);
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InstructionEpilogue(cbi);
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return true;
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}
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@ -3,6 +3,7 @@
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#include "common/log.h"
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#include "common/state_wrapper.h"
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#include "cpu_core.h"
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#include "cpu_core_private.h"
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#include "system.h"
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Log_SetChannel(TimingEvents);
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@ -49,9 +50,12 @@ std::unique_ptr<TimingEvent> CreateTimingEvent(std::string name, TickCount perio
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void UpdateCPUDowncount()
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{
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if (!CPU::g_state.frame_done)
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if (!CPU::g_state.frame_done &&
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(!CPU::HasPendingInterrupt() || g_settings.cpu_execution_mode == CPUExecutionMode::Interpreter))
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{
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CPU::g_state.downcount = s_active_events_head->GetDowncount();
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}
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}
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static void SortEvent(TimingEvent* event)
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{
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