CPU/Recompiler: Fix build error

Build currently fails on a GCC 13.2.x with:

/var/tmp/portage/games-emulation/duckstation-9999/work/duckstation/src/core/cpu_recompiler_code_generator.cpp: In member function ‘bool CPU::Recompiler::CodeGenerator::Compile_Bitwise(CPU::Instruction, const CPU::CodeCache::InstructionInfo&)’:
/var/tmp/portage/games-emulation/duckstation-9999/work/duckstation/src/core/cpu_recompiler_code_generator.cpp:1330:81: error: operands to ‘?:’ have different types ‘BitField<unsigned int, CPU::Reg, 16, 5>’ and ‘BitField<unsigned int, CPU::Reg, 21, 5>’
 1330 |                                PGXP::PackMoveArgs(dest, lhs.HasConstantValue(0) ? instruction.r.rt : instruction.r.rs)),
      |                                                         ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/var/tmp/portage/games-emulation/duckstation-9999/work/duckstation/src/core/cpu_recompiler_code_generator.cpp:1362:81: error: operands to ‘?:’ have different types ‘BitField<unsigned int, CPU::Reg, 16, 5>’ and ‘BitField<unsigned int, CPU::Reg, 21, 5>’
 1362 |                                PGXP::PackMoveArgs(dest, lhs.HasConstantValue(0) ? instruction.r.rt : instruction.r.rs)),
      |                                                         ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This commit is contained in:
Tobias Jakobi 2023-12-26 12:52:38 +01:00
parent abbcd65563
commit dbe29bd5ca

View file

@ -1325,9 +1325,11 @@ bool CodeGenerator::Compile_Bitwise(Instruction instruction, const CodeCache::In
((lhs.HasConstantValue(0) && instruction.r.rt != Reg::zero && dest != instruction.r.rs) || ((lhs.HasConstantValue(0) && instruction.r.rt != Reg::zero && dest != instruction.r.rs) ||
(rhs.HasConstantValue(0) && instruction.r.rs != Reg::zero && dest != instruction.r.rt))) (rhs.HasConstantValue(0) && instruction.r.rs != Reg::zero && dest != instruction.r.rt)))
{ {
const auto rs = lhs.HasConstantValue(0) ? static_cast<CPU::Reg>(instruction.r.rt) : static_cast<CPU::Reg>(instruction.r.rs);
EmitFunctionCall(nullptr, &PGXP::CPU_MOVE_Packed, EmitFunctionCall(nullptr, &PGXP::CPU_MOVE_Packed,
Value::FromConstantU32( Value::FromConstantU32(
PGXP::PackMoveArgs(dest, lhs.HasConstantValue(0) ? instruction.r.rt : instruction.r.rs)), PGXP::PackMoveArgs(dest, rs)),
lhs.HasConstantValue(0) ? rhs : lhs); lhs.HasConstantValue(0) ? rhs : lhs);
} }
} }
@ -1357,9 +1359,11 @@ bool CodeGenerator::Compile_Bitwise(Instruction instruction, const CodeCache::In
((lhs.HasConstantValue(0) && instruction.r.rt != Reg::zero && dest != instruction.r.rs) || ((lhs.HasConstantValue(0) && instruction.r.rt != Reg::zero && dest != instruction.r.rs) ||
(rhs.HasConstantValue(0) && instruction.r.rs != Reg::zero && dest != instruction.r.rt))) (rhs.HasConstantValue(0) && instruction.r.rs != Reg::zero && dest != instruction.r.rt)))
{ {
const auto rs = lhs.HasConstantValue(0) ? static_cast<CPU::Reg>(instruction.r.rt) : static_cast<CPU::Reg>(instruction.r.rs);
EmitFunctionCall(nullptr, &PGXP::CPU_MOVE_Packed, EmitFunctionCall(nullptr, &PGXP::CPU_MOVE_Packed,
Value::FromConstantU32( Value::FromConstantU32(
PGXP::PackMoveArgs(dest, lhs.HasConstantValue(0) ? instruction.r.rt : instruction.r.rs)), PGXP::PackMoveArgs(dest, rs)),
lhs.HasConstantValue(0) ? rhs : lhs); lhs.HasConstantValue(0) ? rhs : lhs);
} }
} }