mirror of
https://github.com/RetroDECK/Duckstation.git
synced 2024-11-22 22:05:38 +00:00
CPU/PGXP: Prefer fresh over tainted Z values
Fixes terrain polygon's Z in Wild Arms 2 after battles.
This commit is contained in:
parent
5672b0da95
commit
ea4efb4e52
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@ -46,6 +46,8 @@ enum : u32
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VALID_X = (1u << 0),
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VALID_X = (1u << 0),
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VALID_Y = (1u << 1),
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VALID_Y = (1u << 1),
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VALID_Z = (1u << 2),
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VALID_Z = (1u << 2),
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VALID_TAINTED_Z = (1u << 31),
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VALID_XY = (VALID_X | VALID_Y),
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VALID_XY = (VALID_X | VALID_Y),
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VALID_XYZ = (VALID_X | VALID_Y | VALID_Z),
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VALID_XYZ = (VALID_X | VALID_Y | VALID_Z),
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VALID_ALL = (VALID_X | VALID_Y | VALID_Z),
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VALID_ALL = (VALID_X | VALID_Y | VALID_Z),
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@ -118,7 +120,7 @@ static void LogValueStr(SmallStringBase& str, const char* name, u32 rval, const
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// clang-format on
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// clang-format on
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static constexpr PGXP_value PGXP_value_invalid = {0.f, 0.f, 0.f, 0, 0};
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static constexpr PGXP_value PGXP_value_invalid = {0.f, 0.f, 0.f, 0, 0};
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static constexpr PGXP_value PGXP_value_zero = {0.f, 0.f, 0.f, 0, VALID_ALL};
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static constexpr PGXP_value PGXP_value_zero = {0.f, 0.f, 0.f, 0, VALID_XY};
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static PGXP_value* s_mem = nullptr;
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static PGXP_value* s_mem = nullptr;
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static PGXP_value* s_vertex_cache = nullptr;
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static PGXP_value* s_vertex_cache = nullptr;
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@ -216,7 +218,7 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::MakeValid(PGXP_value* pV, u32 psxV)
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pV->x = static_cast<float>(static_cast<s16>(Truncate16(psxV)));
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pV->x = static_cast<float>(static_cast<s16>(Truncate16(psxV)));
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pV->y = static_cast<float>(static_cast<s16>(Truncate16(psxV >> 16)));
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pV->y = static_cast<float>(static_cast<s16>(Truncate16(psxV >> 16)));
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pV->z = 0.0f;
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pV->z = 0.0f;
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pV->flags = VALID_XY;
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pV->flags = VALID_XY | VALID_TAINTED_Z;
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pV->value = psxV;
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pV->value = psxV;
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}
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}
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@ -371,16 +373,17 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::WriteMem16(const PGXP_value* src, u32 addr
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ALWAYS_INLINE_RELEASE void CPU::PGXP::CopyZIfMissing(PGXP_value& dst, const PGXP_value& src)
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ALWAYS_INLINE_RELEASE void CPU::PGXP::CopyZIfMissing(PGXP_value& dst, const PGXP_value& src)
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{
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{
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if (dst.HasValid(COMP_Z))
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dst.z = dst.HasValid(COMP_Z) ? dst.z : src.z;
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return;
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dst.z = src.z;
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dst.flags |= (src.flags & VALID_Z);
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dst.flags |= (src.flags & VALID_Z);
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}
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}
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ALWAYS_INLINE_RELEASE void CPU::PGXP::SelectZ(PGXP_value& dst, const PGXP_value& src1, const PGXP_value& src2)
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ALWAYS_INLINE_RELEASE void CPU::PGXP::SelectZ(PGXP_value& dst, const PGXP_value& src1, const PGXP_value& src2)
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{
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{
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dst.z = src1.HasValid(COMP_Z) ? src1.z : src2.z;
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// Prefer src2 if src1 is missing Z, or is potentially an imprecise value, when src2 is precise.
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dst.z = (!(src1.flags & VALID_Z) ||
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(src1.flags & VALID_TAINTED_Z && (src2.flags & (VALID_Z | VALID_TAINTED_Z)) == VALID_Z)) ?
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src2.z :
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src1.z;
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dst.flags |= ((src1.flags | src2.flags) & VALID_Z);
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dst.flags |= ((src1.flags | src2.flags) & VALID_Z);
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}
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}
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@ -426,7 +429,7 @@ void CPU::PGXP::LogValueStr(SmallStringBase& str, const char* name, u32 rval, co
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str.append_format(", {{{},{},{}}}", val->x, val->y, val->z);
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str.append_format(", {{{},{},{}}}", val->x, val->y, val->z);
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if (val->flags != 0)
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if (val->flags & VALID_ALL)
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{
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{
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str.append(", valid=");
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str.append(", valid=");
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if (val->flags & VALID_X)
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if (val->flags & VALID_X)
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@ -437,6 +440,9 @@ void CPU::PGXP::LogValueStr(SmallStringBase& str, const char* name, u32 rval, co
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str.append('Z');
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str.append('Z');
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}
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}
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// if (val->flags & VALID_TAINTED_Z)
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// str.append(", tainted");
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str.append(']');
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str.append(']');
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}
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}
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}
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}
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@ -759,6 +765,8 @@ void CPU::PGXP::CPU_ADDI(u32 instr, u32 rsVal)
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prtVal.y += (prtVal.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (prtVal.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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prtVal.y += (prtVal.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (prtVal.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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prtVal.value = rsVal + tempImm.d;
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prtVal.value = rsVal + tempImm.d;
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prtVal.flags |= VALID_TAINTED_Z;
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}
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}
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void CPU::PGXP::CPU_ANDI(u32 instr, u32 rsVal)
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void CPU::PGXP::CPU_ANDI(u32 instr, u32 rsVal)
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@ -779,13 +787,14 @@ void CPU::PGXP::CPU_ANDI(u32 instr, u32 rsVal)
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prtVal.value = rtVal;
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prtVal.value = rtVal;
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prtVal.y = 0.f; // remove upper 16-bits
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prtVal.y = 0.f; // remove upper 16-bits
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prtVal.SetValid(COMP_Y);
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prtVal.SetValid(COMP_Y);
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prtVal.flags |= VALID_TAINTED_Z;
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switch (imm(instr))
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switch (imm(instr))
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{
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{
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case 0:
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case 0:
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// if 0 then x == 0
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// if 0 then x == 0
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// TODO: x should be valid here
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prtVal.x = 0.0f;
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prtVal.x = 0.f;
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prtVal.SetValid(COMP_X);
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break;
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break;
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case 0xFFFF:
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case 0xFFFF:
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// if saturated then x == x
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// if saturated then x == x
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@ -820,6 +829,7 @@ void CPU::PGXP::CPU_ORI(u32 instr, u32 rsVal)
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// otherwise x is low precision value
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// otherwise x is low precision value
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ret.x = vRt.sw.l;
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ret.x = vRt.sw.l;
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ret.SetValid(COMP_X);
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ret.SetValid(COMP_X);
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ret.flags |= VALID_TAINTED_Z;
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break;
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break;
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}
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}
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@ -849,6 +859,7 @@ void CPU::PGXP::CPU_XORI(u32 instr, u32 rsVal)
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// otherwise x is low precision value
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// otherwise x is low precision value
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ret.x = vRt.sw.l;
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ret.x = vRt.sw.l;
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ret.SetValid(COMP_X);
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ret.SetValid(COMP_X);
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ret.flags |= VALID_TAINTED_Z;
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break;
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break;
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}
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}
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@ -869,6 +880,7 @@ void CPU::PGXP::CPU_SLTI(u32 instr, u32 rsVal)
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ret.y = 0.f;
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ret.y = 0.f;
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ret.x = (g_state.pgxp_gpr[rs(instr)].x < tempImm.sw.h) ? 1.f : 0.f;
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ret.x = (g_state.pgxp_gpr[rs(instr)].x < tempImm.sw.h) ? 1.f : 0.f;
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ret.SetValid(COMP_Y);
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ret.SetValid(COMP_Y);
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ret.flags |= VALID_TAINTED_Z;
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ret.value = BoolToUInt32(static_cast<s32>(rsVal) < imm_sext(instr));
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ret.value = BoolToUInt32(static_cast<s32>(rsVal) < imm_sext(instr));
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g_state.pgxp_gpr[rt(instr)] = ret;
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g_state.pgxp_gpr[rt(instr)] = ret;
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@ -887,6 +899,7 @@ void CPU::PGXP::CPU_SLTIU(u32 instr, u32 rsVal)
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ret.y = 0.f;
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ret.y = 0.f;
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ret.x = (f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < tempImm.w.h) ? 1.f : 0.f;
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ret.x = (f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < tempImm.w.h) ? 1.f : 0.f;
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ret.SetValid(COMP_Y);
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ret.SetValid(COMP_Y);
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ret.flags |= VALID_TAINTED_Z;
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ret.value = BoolToUInt32(rsVal < imm(instr));
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ret.value = BoolToUInt32(rsVal < imm(instr));
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g_state.pgxp_gpr[rt(instr)] = ret;
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g_state.pgxp_gpr[rt(instr)] = ret;
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@ -922,10 +935,12 @@ void CPU::PGXP::CPU_ADD(u32 instr, u32 rsVal, u32 rtVal)
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if (rtVal == 0)
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if (rtVal == 0)
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{
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{
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ret = g_state.pgxp_gpr[rs(instr)];
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ret = g_state.pgxp_gpr[rs(instr)];
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CopyZIfMissing(ret, g_state.pgxp_gpr[rt(instr)]);
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}
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}
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else if (rsVal == 0)
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else if (rsVal == 0)
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{
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{
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ret = g_state.pgxp_gpr[rt(instr)];
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ret = g_state.pgxp_gpr[rt(instr)];
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CopyZIfMissing(ret, g_state.pgxp_gpr[rs(instr)]);
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}
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}
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else
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else
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{
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{
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@ -951,15 +966,8 @@ void CPU::PGXP::CPU_ADD(u32 instr, u32 rsVal, u32 rtVal)
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// truncate on overflow/underflow
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// truncate on overflow/underflow
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ret.y += (ret.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (ret.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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ret.y += (ret.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (ret.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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// TODO: decide which "z/w" component to use
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SelectZ(ret, ret, g_state.pgxp_gpr[rt(instr)]);
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ret.flags |= VALID_TAINTED_Z;
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ret.flags &= (g_state.pgxp_gpr[rt(instr)].flags & VALID_XY) | ~VALID_XY;
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}
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if (!(ret.flags & VALID_Z) && (g_state.pgxp_gpr[rt(instr)].flags & VALID_Z))
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{
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ret.z = g_state.pgxp_gpr[rt(instr)].z;
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ret.SetValid(COMP_Z);
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}
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}
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ret.value = rsVal + rtVal;
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ret.value = rsVal + rtVal;
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@ -979,6 +987,7 @@ void CPU::PGXP::CPU_SUB(u32 instr, u32 rsVal, u32 rtVal)
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if (rtVal == 0)
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if (rtVal == 0)
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{
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{
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ret = g_state.pgxp_gpr[rs(instr)];
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ret = g_state.pgxp_gpr[rs(instr)];
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CopyZIfMissing(ret, g_state.pgxp_gpr[rs(instr)]);
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}
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}
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else
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else
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{
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{
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@ -1003,16 +1012,11 @@ void CPU::PGXP::CPU_SUB(u32 instr, u32 rsVal, u32 rtVal)
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// truncate on overflow/underflow
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// truncate on overflow/underflow
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ret.y += (ret.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (ret.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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ret.y += (ret.y > SHRT_MAX) ? -(USHRT_MAX + 1) : (ret.y < SHRT_MIN) ? USHRT_MAX + 1 : 0.f;
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ret.flags &= (g_state.pgxp_gpr[rt(instr)].flags & VALID_XY) | ~VALID_XY;
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SelectZ(ret, ret, g_state.pgxp_gpr[rt(instr)]);
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ret.flags |= VALID_TAINTED_Z;
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}
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ret.value = rsVal - rtVal;
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ret.value = rsVal - rtVal;
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}
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if (!(ret.flags & VALID_Z) && (g_state.pgxp_gpr[rt(instr)].flags & VALID_Z))
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{
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ret.z = g_state.pgxp_gpr[rt(instr)].z;
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ret.SetValid(COMP_Z);
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}
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g_state.pgxp_gpr[rd(instr)] = ret;
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g_state.pgxp_gpr[rd(instr)] = ret;
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}
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}
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@ -1040,7 +1044,7 @@ ALWAYS_INLINE_RELEASE void CPU::PGXP::CPU_BITWISE(u32 instr, u32 rdVal, u32 rsVa
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valt.d = rtVal;
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valt.d = rtVal;
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PGXP_value ret;
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PGXP_value ret;
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ret.flags = VALID_XY;
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ret.flags = VALID_XY | VALID_TAINTED_Z;
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if (vald.w.l == 0)
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if (vald.w.l == 0)
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{
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{
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@ -1163,6 +1167,7 @@ void CPU::PGXP::CPU_SLT(u32 instr, u32 rsVal, u32 rtVal)
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PGXP_value ret = g_state.pgxp_gpr[rs(instr)];
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PGXP_value ret = g_state.pgxp_gpr[rs(instr)];
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ret.y = 0.f;
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ret.y = 0.f;
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ret.SetValid(COMP_Y);
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ret.SetValid(COMP_Y);
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ret.flags |= VALID_TAINTED_Z;
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ret.x = (g_state.pgxp_gpr[rs(instr)].y < g_state.pgxp_gpr[rt(instr)].y) ? 1.f :
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ret.x = (g_state.pgxp_gpr[rs(instr)].y < g_state.pgxp_gpr[rt(instr)].y) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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@ -1191,6 +1196,7 @@ void CPU::PGXP::CPU_SLTU(u32 instr, u32 rsVal, u32 rtVal)
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PGXP_value ret = g_state.pgxp_gpr[rs(instr)];
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PGXP_value ret = g_state.pgxp_gpr[rs(instr)];
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ret.y = 0.f;
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ret.y = 0.f;
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ret.SetValid(COMP_Y);
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ret.SetValid(COMP_Y);
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ret.flags |= VALID_TAINTED_Z;
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ret.x = (f16Unsign(g_state.pgxp_gpr[rs(instr)].y) < f16Unsign(g_state.pgxp_gpr[rt(instr)].y)) ? 1.f :
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ret.x = (f16Unsign(g_state.pgxp_gpr[rs(instr)].y) < f16Unsign(g_state.pgxp_gpr[rt(instr)].y)) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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(f16Unsign(g_state.pgxp_gpr[rs(instr)].x) < f16Unsign(g_state.pgxp_gpr[rt(instr)].x)) ? 1.f :
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@ -1248,8 +1254,10 @@ void CPU::PGXP::CPU_MULT(u32 instr, u32 rsVal, u32 rtVal)
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(ly);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(ly);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].flags |= VALID_TAINTED_Z;
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(hy);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(hy);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].flags |= VALID_TAINTED_Z;
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// compute PSX value
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// compute PSX value
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const u64 result = static_cast<u64>(static_cast<s64>(SignExtend64(rsVal)) * static_cast<s64>(SignExtend64(rtVal)));
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const u64 result = static_cast<u64>(static_cast<s64>(SignExtend64(rsVal)) * static_cast<s64>(SignExtend64(rtVal)));
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@ -1301,8 +1309,10 @@ void CPU::PGXP::CPU_MULTU(u32 instr, u32 rsVal, u32 rtVal)
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(ly);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(ly);
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g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].flags |= VALID_TAINTED_Z;
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hx);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(hy);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(hy);
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g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].flags |= VALID_TAINTED_Z;
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// compute PSX value
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// compute PSX value
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const u64 result = ZeroExtend64(rsVal) * ZeroExtend64(rtVal);
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const u64 result = ZeroExtend64(rsVal) * ZeroExtend64(rtVal);
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@ -1339,10 +1349,12 @@ void CPU::PGXP::CPU_DIV(u32 instr, u32 rsVal, u32 rtVal)
|
||||||
double lo = vs / vt;
|
double lo = vs / vt;
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(f16Overflow(lo));
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(f16Overflow(lo));
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lo);
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lo);
|
||||||
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].flags |= VALID_TAINTED_Z;
|
||||||
|
|
||||||
double hi = fmod(vs, vt);
|
double hi = fmod(vs, vt);
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(f16Overflow(hi));
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(f16Overflow(hi));
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hi);
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hi);
|
||||||
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].flags |= VALID_TAINTED_Z;
|
||||||
|
|
||||||
// compute PSX value
|
// compute PSX value
|
||||||
if (static_cast<s32>(rtVal) == 0)
|
if (static_cast<s32>(rtVal) == 0)
|
||||||
|
@ -1396,10 +1408,12 @@ void CPU::PGXP::CPU_DIVU(u32 instr, u32 rsVal, u32 rtVal)
|
||||||
double lo = vs / vt;
|
double lo = vs / vt;
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(f16Overflow(lo));
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].y = (float)f16Sign(f16Overflow(lo));
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lo);
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].x = (float)f16Sign(lo);
|
||||||
|
g_state.pgxp_gpr[static_cast<u8>(Reg::lo)].flags |= VALID_TAINTED_Z;
|
||||||
|
|
||||||
double hi = fmod(vs, vt);
|
double hi = fmod(vs, vt);
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(f16Overflow(hi));
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].y = (float)f16Sign(f16Overflow(hi));
|
||||||
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hi);
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].x = (float)f16Sign(hi);
|
||||||
|
g_state.pgxp_gpr[static_cast<u8>(Reg::hi)].flags |= VALID_TAINTED_Z;
|
||||||
|
|
||||||
if (rtVal == 0)
|
if (rtVal == 0)
|
||||||
{
|
{
|
||||||
|
@ -1460,6 +1474,7 @@ void CPU::PGXP::CPU_SLL(u32 instr, u32 rtVal)
|
||||||
prdVal.x = static_cast<float>(x);
|
prdVal.x = static_cast<float>(x);
|
||||||
prdVal.y = static_cast<float>(y);
|
prdVal.y = static_cast<float>(y);
|
||||||
prdVal.value = rdVal;
|
prdVal.value = rdVal;
|
||||||
|
prdVal.flags |= VALID_TAINTED_Z;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CPU::PGXP::CPU_SRL(u32 instr, u32 rtVal)
|
void CPU::PGXP::CPU_SRL(u32 instr, u32 rtVal)
|
||||||
|
@ -1525,6 +1540,7 @@ void CPU::PGXP::CPU_SRL(u32 instr, u32 rtVal)
|
||||||
prdVal.x = static_cast<float>(x);
|
prdVal.x = static_cast<float>(x);
|
||||||
prdVal.y = static_cast<float>(y);
|
prdVal.y = static_cast<float>(y);
|
||||||
prdVal.value = rdVal;
|
prdVal.value = rdVal;
|
||||||
|
prdVal.flags |= VALID_TAINTED_Z;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CPU::PGXP::CPU_SRA(u32 instr, u32 rtVal)
|
void CPU::PGXP::CPU_SRA(u32 instr, u32 rtVal)
|
||||||
|
@ -1590,6 +1606,7 @@ void CPU::PGXP::CPU_SRA(u32 instr, u32 rtVal)
|
||||||
prdVal.x = static_cast<float>(x);
|
prdVal.x = static_cast<float>(x);
|
||||||
prdVal.y = static_cast<float>(y);
|
prdVal.y = static_cast<float>(y);
|
||||||
prdVal.value = rdVal;
|
prdVal.value = rdVal;
|
||||||
|
prdVal.flags |= VALID_TAINTED_Z;
|
||||||
|
|
||||||
// Use low precision/rounded values when we're not shifting an entire component,
|
// Use low precision/rounded values when we're not shifting an entire component,
|
||||||
// and it's not originally from a 3D value. Too many false positives in P2/etc.
|
// and it's not originally from a 3D value. Too many false positives in P2/etc.
|
||||||
|
@ -1649,6 +1666,7 @@ void CPU::PGXP::CPU_SLLV(u32 instr, u32 rtVal, u32 rsVal)
|
||||||
prdVal.x = static_cast<float>(x);
|
prdVal.x = static_cast<float>(x);
|
||||||
prdVal.y = static_cast<float>(y);
|
prdVal.y = static_cast<float>(y);
|
||||||
prdVal.value = rdVal;
|
prdVal.value = rdVal;
|
||||||
|
prdVal.flags |= VALID_TAINTED_Z;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CPU::PGXP::CPU_SRLV(u32 instr, u32 rtVal, u32 rsVal)
|
void CPU::PGXP::CPU_SRLV(u32 instr, u32 rtVal, u32 rsVal)
|
||||||
|
@ -1708,12 +1726,12 @@ void CPU::PGXP::CPU_SRLV(u32 instr, u32 rtVal, u32 rsVal)
|
||||||
else
|
else
|
||||||
y = y / (1 << sh);
|
y = y / (1 << sh);
|
||||||
|
|
||||||
|
|
||||||
PGXP_value& prdVal = g_state.pgxp_gpr[rd(instr)];
|
PGXP_value& prdVal = g_state.pgxp_gpr[rd(instr)];
|
||||||
prdVal = prtVal;
|
prdVal = prtVal;
|
||||||
prdVal.x = static_cast<float>(f16Sign(x));
|
prdVal.x = static_cast<float>(f16Sign(x));
|
||||||
prdVal.y = static_cast<float>(f16Sign(y));
|
prdVal.y = static_cast<float>(f16Sign(y));
|
||||||
prdVal.value = rdVal;
|
prdVal.value = rdVal;
|
||||||
|
prdVal.flags |= VALID_TAINTED_Z;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CPU::PGXP::CPU_SRAV(u32 instr, u32 rtVal, u32 rsVal)
|
void CPU::PGXP::CPU_SRAV(u32 instr, u32 rtVal, u32 rsVal)
|
||||||
|
@ -1778,6 +1796,7 @@ void CPU::PGXP::CPU_SRAV(u32 instr, u32 rtVal, u32 rsVal)
|
||||||
prdVal.x = static_cast<float>(f16Sign(x));
|
prdVal.x = static_cast<float>(f16Sign(x));
|
||||||
prdVal.y = static_cast<float>(f16Sign(y));
|
prdVal.y = static_cast<float>(f16Sign(y));
|
||||||
prdVal.value = rdVal;
|
prdVal.value = rdVal;
|
||||||
|
prdVal.flags |= VALID_TAINTED_Z;
|
||||||
}
|
}
|
||||||
|
|
||||||
void CPU::PGXP::CPU_MFC0(u32 instr, u32 rdVal)
|
void CPU::PGXP::CPU_MFC0(u32 instr, u32 rdVal)
|
||||||
|
|
Loading…
Reference in a new issue