Xargon/Duckstation
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Author SHA1 Message Date
Connor McLaughlin 851ef67814 GPU: Implement fill VRAM command 2019-09-14 16:43:53 +10:00
Connor McLaughlin 46870c6a7a GPU: Implement basic rectangle rendering 2019-09-14 16:27:24 +10:00
Connor McLaughlin f47d44c151 CPU: Implement break instruction 2019-09-14 14:41:41 +10:00
Connor McLaughlin 32a36ef1bc CPU: Implement alignment (memory) exception 2019-09-14 14:29:23 +10:00
Connor McLaughlin 0726095f00 CPU: Implement fixed dcache/scratchpad 2019-09-14 14:18:42 +10:00
Connor McLaughlin ced3038e73 CPU: Implement sub instruction 2019-09-14 13:39:36 +10:00
Connor McLaughlin 1afa02d475 CPU: Fix overflowed register written back in add instruction 2019-09-14 13:33:29 +10:00
Connor McLaughlin 459db392e7 CPU: Add missing cop0 register reads 2019-09-14 13:31:44 +10:00
Connor McLaughlin 9f36384752 System: Support sideloading EXE files via BIOS patch 2019-09-14 13:22:34 +10:00
Connor McLaughlin ae43cc838b GPU: Partially implemented texture support 2019-09-14 02:07:31 +10:00
Connor McLaughlin cfe361c1a6 GPU: Basic/hacky CPU->VRAM transfers 2019-09-13 01:10:08 +10:00
Connor McLaughlin 52b619facc DMA: Implement block transfers 2019-09-13 01:09:44 +10:00
Connor McLaughlin aea7a18ac2 GPU: More work on OpenGL renderer 2019-09-13 01:09:07 +10:00
Connor McLaughlin 4706a906d5 GPU: Base work for hardware renderer 2019-09-12 12:53:04 +10:00
Connor McLaughlin c0853de6a6 GPU: Partial render polygon command processing 2019-09-11 16:04:31 +10:00
Connor McLaughlin 162f94337e DMA: Implement linked list mode 2019-09-11 15:02:22 +10:00
Connor McLaughlin 27913cd20a Partial implementation of DMA controller and GPU stubs 2019-09-11 14:01:19 +10:00
Connor McLaughlin 2149ab4d69 Initial commit 2019-09-11 14:00:42 +10:00