Xargon/Duckstation
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3 commits

Author SHA1 Message Date
Connor McLaughlin 98e67616ec JitCodeBuffer: Flush cache after committing code on ARM CPUs 
ARM's instruction and data caches are not coherent, so we need to flush
before executing to ensure there's no stale data left over.
 2019-12-03 20:21:32 +10:00
Connor McLaughlin 11966e4caf CPU/Recompiler: Write exception exits to far code buffer 
Keeps the hot path nice and clean.
 2019-11-22 18:01:28 +10:00
Connor McLaughlin 2149ab4d69 Initial commit 2019-09-11 14:00:42 +10:00