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1871 commits 1 branch 1 tag 100 MiB
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29 commits

Author SHA1 Message Date
Connor McLaughlin 57cf40d1ae Bus: Work around VS2017 bug with std::array 2020-07-08 12:45:53 +10:00
Connor McLaughlin e293c22cde DMA: Run manual channels while halted 
Fixes games which have looping linked lists but still expect CD/OTC
reads to work.

Also caps the number of ticks used when looping linked lists are
present, which doesn't steal so much time from the CPU per batch.

Fixes:
 - Victory Spike
 - Magical Drop III - Yokubari Tokudai-gou!
 - Yuukyuu no Eden - The Eternal Eden
 - Loading screen in World Cup Golf - Professional Edition
 2020-05-31 02:43:51 +10:00
Connor McLaughlin 7d887edf17 DMA: Write correct terminator at end of OTC 
Fixes NBA Live 96.
 2020-05-17 13:58:26 +10:00
Connor McLaughlin 5cd78dcab5 DMA: Fix an unlikely case where LL DMA gets stuck on 
Fixes Frogger.
 2020-04-30 14:52:38 +10:00
Connor McLaughlin 940b725c1d Settings: Make DMA performance parameters tweakable 2020-04-29 20:00:22 +10:00
Connor McLaughlin 9d1eb321ec DMA: Properly handle infinite linked lists, add cycle stealing 
Fixes Tekken 2, Hot Wheels Turbo Racing, probably others.
 2020-04-29 16:52:15 +10:00
Connor McLaughlin 07e8ddcae2 DMA: Elide intermediate copy where possible 
Easy 5% performance improvement.
 2020-04-29 16:52:11 +10:00
Connor McLaughlin 1757932b3a GPU: Implement FIFO and timings 
This will cause a slight performance loss. I've left some knobs in which
can be tweaked to mitigate this, but the goal is to be compatible with
all games which require them.
 2020-04-19 01:17:28 +10:00
Connor McLaughlin 5dbdc0b60c DMA: Remove timing events 
We'll probably need to revert/re-add a variant of this when we
eventually implement chopping. But for now it simplifies things.
 2020-03-29 01:12:44 +10:00
Connor McLaughlin 423f04325f SPU: Implement timing for RAM reads/writes 2020-03-29 01:12:37 +10:00
Connor McLaughlin d4ae0f13fe MDEC: Refactoring and fixes 2020-03-26 00:13:07 +10:00
Connor McLaughlin c81efb1142 DMA: Enable block splitting for linked list mode 2020-03-26 00:13:03 +10:00
Connor McLaughlin 8ef1e71ce0 DMA: Channels other than OTC should run based on request in SyncMode 0 2020-03-21 00:15:49 +10:00
Connor McLaughlin f4d172df2f DMA: Fix underflow when block_count == 0 2020-03-21 00:15:42 +10:00
Connor McLaughlin 1b9609ef61 Implement event-based scheduler instead of lock-step components 2020-01-24 16:23:39 +10:00
Connor McLaughlin c6119c210a Revert "DMA: Delay GPU transfers by block count" 
This reverts commit 0639f4264f.

Breaks FF7's FMVs in the top row. Needs GPU timings.
 2020-01-11 13:40:04 +10:00
Connor McLaughlin 71c1e243fe Remove YBaseLib dependency 2020-01-10 13:40:53 +10:00
Connor McLaughlin 0639f4264f DMA: Delay GPU transfers by block count 
Needs real GPU timings, but fixes NFS5 in the meantime.
 2019-12-29 15:34:07 +10:00
Connor McLaughlin f12b97e98b DMA: Add missing transfer_ticks to save state 2019-11-16 01:51:22 +10:00
Connor McLaughlin 30fd7a6683 DMA: Support delaying transfers 
Fixes Syphon Filter 2/3.
 2019-11-15 23:27:56 +10:00
Connor McLaughlin f3baee2582 DMA: Hack for self-referencing DMA loops 
I need to figure how these are being generated in the first place.
 2019-11-11 20:37:13 +10:00
Connor McLaughlin 29674df803 DMA: Simplify address masking 2019-11-11 20:34:41 +10:00
Connor McLaughlin 6f4cf7d5e3 System: Support changing BIOS path 2019-11-11 19:43:39 +10:00
Connor McLaughlin a76ec6fc19 Compile fixes for GCC 2019-10-22 23:07:51 +10:00
Connor McLaughlin 6b4298541c DMA: Fix DICR write breaking FMVs in FF7 2019-10-18 23:52:50 +10:00
Connor McLaughlin ec8c5d4bb6 DMA: Batch multi-word transfers together 2019-10-13 16:48:11 +10:00
Connor McLaughlin 88ec178380 DMA: Refactoring, support split block transfers 2019-10-13 14:16:49 +10:00
Connor McLaughlin 14d32c882a DMA: Kick start transfers on master enable 2019-10-11 02:18:16 +10:00
Connor McLaughlin bddbab9d60 Rename to DuckStation 2019-10-04 13:54:09 +10:00
Renamed from src/pse/dma.cpp (Browse further)