12 commits

Author	SHA1	Message	Date
Stenzek	71a07a5a8e	CPU/NewRec: Fix lwl/lwr on ARM	2024-03-31 23:49:40 +10:00
Stenzek	53c0dc8bbc	CPU/NewRec: Speculative execution for mult/div	2024-02-24 14:57:30 +10:00
Stenzek	175d2a17f7	CPU/NewRec: Don't panic on unused opcodes	2024-02-24 14:57:29 +10:00
Stenzek	8fe6ef1fa8	CPU/NewRec: Allocate callee-saved registers before caller-saved	2023-12-21 02:00:19 +10:00
Stenzek	bc2c334370	Misc: Combine some redundant functions	2023-12-13 20:56:40 +10:00
Stenzek	185af2b039	CPU/NewRec: Fix lui/mfc0 not getting called in CPU PGXP mode	2023-12-06 20:12:20 +10:00
Stenzek	2071addce0	CPU/NewRec: Fix OOB reads on InstructionInfo	2023-12-05 00:27:55 +10:00
Stenzek	e10ff550d5	CPU/NewRec: Handle inside-block SMC ... i.e. Spyro 2/3 PAL.	2023-11-21 22:31:18 +10:00
Stenzek	20de40a597	RegTest: Fix build on Mac	2023-11-21 22:31:18 +10:00
Stenzek	3dfc3bd2ba	CPU: Fix incorrect scratchpad masking	2023-11-06 18:09:27 +10:00
Stenzek	6592cafadc	CPU/NewRec: Add speculative constants	2023-10-22 00:07:46 +10:00
Stenzek	9501439d6b	CPU: Add new experimental recompiler	2023-10-18 00:49:01 +10:00