Commit graph

57 commits

Author SHA1 Message Date
Silent 270899dbdb
Make DoSafeMemoryAccess return true properly for RAM, BIOS, dcache writes
Fixes broken cheats when writing to unaligned addresses,
maybe also achievements.
2021-09-24 10:07:04 +02:00
Connor McLaughlin f7f121f036 Bus: Handle unaligned accesses in safe memory routines 2021-09-15 12:24:33 +10:00
Connor McLaughlin 8dcd68b0a8 CPU: Make Safe{Read,Write}Memory{Byte,Halfword,Word} truely safe 2021-09-10 15:53:14 +10:00
Connor McLaughlin 1ed1d641a6 CPU/Recompiler: Don't use intepreter icache when falling back
Fixes broken rendering in TOCA 2.

It has self-modifying code every frame, which gets falled back to the
interpreter, and using the interpreter's icache, which resulted in
stale code executing.
2021-05-20 12:19:23 +10:00
Connor McLaughlin 729675f497 Bus: Fix memory reserving when 8MB RAM is enabled 2021-05-08 20:36:34 +10:00
Connor McLaughlin e382df0d41 Support expanding RAM to 8MB (dev console) 2021-05-03 12:43:33 +10:00
Connor McLaughlin 40731b49fc Bus: Handle CPU-internal narrow writes
The full 32-bits of the GPR are used.

Fixes SoundScope in the BIOS Shell.
2021-04-26 22:08:18 +10:00
Connor McLaughlin 3106c797d9 CPU: Reduce severity of some log statements 2021-04-19 15:19:08 +10:00
Connor McLaughlin 6868ad4326 Bus: Don't reserve entire fastmem region on Android 2021-04-17 16:33:25 +10:00
Connor McLaughlin 58f5c99100 Bus: Fix incorrect EPC for IBE exceptions 2021-04-14 19:01:43 +10:00
Connor McLaughlin e087e6f3a2 CPU/Recompiler: Prevent using fastmem when cache is isolated
No point even trying since it's just going to fault.
2021-04-12 02:08:56 +10:00
Connor McLaughlin 922d320523 CPU/Recompiler: Reserve whole fastmem region to avoid clashes 2021-04-11 12:42:51 +10:00
Connor McLaughlin 701edb335a Various warning fixes 2021-02-06 19:19:55 +10:00
C.W. Betts 662d6e9711 Fix possible log formatting errors. 2021-02-04 17:54:51 -07:00
Connor McLaughlin f832dca975 Bus: Don't force inline EXP1/EXP2 access 2021-01-06 01:02:30 +10:00
Connor McLaughlin f3cdfe97a7 Bus/EXP2: Support openbios putc address 2021-01-06 00:56:35 +10:00
Connor McLaughlin e3262fc0a4 CPU: Compile fix for debug builds 2021-01-05 00:46:41 +10:00
Connor McLaughlin 68dc052432 Bus: Don't leak shared memory when starting->stopping->starting 2020-12-27 00:50:08 +10:00
Connor McLaughlin 9fd1d606d7 Bus: Add memory region access helpers 2020-12-17 11:57:46 +10:00
Connor McLaughlin 9089c97339 CPU: Drop cache control log to dev level 2020-12-04 01:19:00 +10:00
Connor McLaughlin bf2e38aed5 CPU/Recompiler: Implement LUT-based fastmem 2020-11-24 14:49:21 +10:00
Connor McLaughlin 028a5c60d7 Bus: Fix failed safe instruction reads raising guest exceptions 2020-11-21 18:39:03 +10:00
Connor McLaughlin a03bca2f72 CPU: Make fastmem a compile-time feature (support 32-bit targets) 2020-11-21 18:39:03 +10:00
Albert Liu c698519d44 Bus: Log writes to additional POST registers 2020-11-09 09:02:00 -08:00
Albert Liu f3522b7b70 Bus: Stub out EXP3 and unknown EXP accesses 2020-11-09 09:02:00 -08:00
Connor McLaughlin be63d893cd CPU: Use partial icache fills for non-line-aligned addresses 2020-10-30 00:44:40 +10:00
Connor McLaughlin 3b3ad0c1cb Bus: Fix icache fills from BIOS failing 2020-10-30 00:44:39 +10:00
Connor McLaughlin f14270fc4b Bus: Ignore reads to nocash EXP2 area 2020-10-30 00:44:39 +10:00
Connor McLaughlin 392c7af738 Bus: Fix assertion failing if booting fails 2020-10-28 17:31:25 +10:00
Connor McLaughlin 7f795d25aa CPU/Recompiler: Don't try fastmem for RAM mirrors 2020-10-26 22:07:52 +10:00
Connor McLaughlin 6a4a4c62d7 CPU/Recompiler: Use fastmem instead of global for RAM loads 2020-10-19 02:23:04 +10:00
Connor McLaughlin b704c37e91 CPU/Recompiler: Implement speculative constants 2020-10-18 14:54:38 +10:00
Connor McLaughlin 7566c45f64 CPU/Recompiler: Implement fastmem 2020-10-18 14:54:38 +10:00
Connor McLaughlin 0afdc04d88 CPU/Recompiler: Optimize constant reads (and some writes) 2020-10-18 14:54:38 +10:00
Connor McLaughlin 19d6037b99 CPU: Implement instruction cache simulation
Implemented for all execution modes. Disabled by default in the cached
interpreter and recompiler, always enabled in the pure interpreter.
2020-08-29 22:07:40 +10:00
Connor McLaughlin 1d5f810a4b CPU/Recompiler: Disable memory access exceptions by default
This means it'll no longer pass amidog's CPU test in the default config.
But no games rely on this. You can enable it in advanced options if you
want to pass the CPU test.
2020-08-08 23:44:13 +10:00
Connor McLaughlin f6e88353eb CPU/Recompiler: Make generated code invariant to virtual PC 2020-08-08 23:06:28 +10:00
Connor McLaughlin b6f871d2b9
JIT optimizations and refactoring (#675)
* CPU/Recompiler: Use rel32 call where possible for no-args

* JitCodeBuffer: Support using preallocated buffer

* CPU/Recompiler/AArch64: Use bl instead of blr for short branches

* CPU/CodeCache: Allocate recompiler buffer in program space

This means we don't need 64-bit moves for every call out of the
recompiler.

* GTE: Don't store as u16 and load as u32

* CPU/Recompiler: Add methods to emit global load/stores

* GTE: Convert class to namespace

* CPU/Recompiler: Call GTE functions directly

* Settings: Turn into a global variable

* GPU: Replace local pointers with global

* InterruptController: Turn into a global pointer

* System: Replace local pointers with global

* Timers: Turn into a global instance

* DMA: Turn into a global instance

* SPU: Turn into a global instance

* CDROM: Turn into a global instance

* MDEC: Turn into a global instance

* Pad: Turn into a global instance

* SIO: Turn into a global instance

* CDROM: Move audio FIFO to the heap

* CPU/Recompiler: Drop ASMFunctions

No longer needed since we have code in the same 4GB window.

* CPUCodeCache: Turn class into namespace

* Bus: Local pointer -> global pointers

* CPU: Turn class into namespace

* Bus: Turn into namespace

* GTE: Store registers in CPU state struct

Allows relative addressing on ARM.

* CPU/Recompiler: Align code storage to page size

* CPU/Recompiler: Fix relative branches on A64

* HostInterface: Local references to global

* System: Turn into a namespace, move events out

* Add guard pages

* Android: Fix build
2020-07-31 17:09:18 +10:00
Connor McLaughlin 57cf40d1ae Bus: Work around VS2017 bug with std::array 2020-07-08 12:45:53 +10:00
Connor McLaughlin e5fc47a008 Bus: Further tweaks to access timing
Matches closely to my console now.

Fixes Otona No Asobi again.
2020-06-01 21:39:33 +10:00
Connor McLaughlin a693437bc9 Bus: Handle unaligned byte writes to SPU 2020-05-20 18:56:41 +10:00
Connor McLaughlin 07e8ddcae2 DMA: Elide intermediate copy where possible
Easy 5% performance improvement.
2020-04-29 16:52:11 +10:00
Connor McLaughlin 71c1e243fe Remove YBaseLib dependency 2020-01-10 13:40:53 +10:00
Connor McLaughlin 315f2b701a Stub out SIO controller
Fixes WipEout booting.
2019-12-07 21:09:04 +10:00
Connor McLaughlin aec01d3890 Bus: Reduce RAM write delay 2019-11-27 00:01:47 +10:00
Connor McLaughlin 519dbc818d CPU/CodeCache: Fix DMA writes not invalidating code blocks
Fixes Crash Team Racing and Spyro in Cached Interpreter/Recompiler
modes.
2019-11-26 19:45:38 +10:00
Connor McLaughlin 9e82afac7b CPU/Recompiler: Support block revalidation instead of flushing 2019-11-22 00:32:40 +10:00
Connor McLaughlin 1d6c4a3af1 CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
2019-11-19 20:38:05 +10:00
Connor McLaughlin 246c97ccb3 System: Scaffolding for multi-system/multi-bios 2019-11-16 20:50:59 +10:00
Connor McLaughlin 6f4cf7d5e3 System: Support changing BIOS path 2019-11-11 19:43:39 +10:00