mirror of
https://github.com/RetroDECK/Duckstation.git
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107 lines
2.5 KiB
C++
107 lines
2.5 KiB
C++
// SPDX-FileCopyrightText: 2019-2022 Connor McLaughlin <stenzek@gmail.com>
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// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
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#include "interrupt_controller.h"
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#include "common/log.h"
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#include "cpu_core.h"
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#include "util/state_wrapper.h"
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Log_SetChannel(InterruptController);
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namespace InterruptController {
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static constexpr u32 REGISTER_WRITE_MASK = (u32(1) << NUM_IRQS) - 1;
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static constexpr u32 DEFAULT_INTERRUPT_MASK = 0; //(u32(1) << NUM_IRQS) - 1;
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static void UpdateCPUInterruptRequest();
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static u32 s_interrupt_status_register = 0;
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static u32 s_interrupt_mask_register = DEFAULT_INTERRUPT_MASK;
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} // namespace InterruptController
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void InterruptController::Initialize()
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{
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Reset();
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}
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void InterruptController::Shutdown() {}
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void InterruptController::Reset()
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{
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s_interrupt_status_register = 0;
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s_interrupt_mask_register = DEFAULT_INTERRUPT_MASK;
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}
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bool InterruptController::DoState(StateWrapper& sw)
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{
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sw.Do(&s_interrupt_status_register);
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sw.Do(&s_interrupt_mask_register);
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return !sw.HasError();
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}
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bool InterruptController::GetIRQLineState()
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{
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return (s_interrupt_status_register != 0);
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}
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void InterruptController::InterruptRequest(IRQ irq)
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{
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const u32 bit = (u32(1) << static_cast<u32>(irq));
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s_interrupt_status_register |= bit;
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UpdateCPUInterruptRequest();
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}
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u32 InterruptController::ReadRegister(u32 offset)
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{
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switch (offset)
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{
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case 0x00: // I_STATUS
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return s_interrupt_status_register;
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case 0x04: // I_MASK
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return s_interrupt_mask_register;
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default:
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Log_ErrorPrintf("Invalid read at offset 0x%08X", offset);
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return UINT32_C(0xFFFFFFFF);
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}
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}
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void InterruptController::WriteRegister(u32 offset, u32 value)
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{
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switch (offset)
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{
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case 0x00: // I_STATUS
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{
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if ((s_interrupt_status_register & ~value) != 0)
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Log_DebugPrintf("Clearing bits 0x%08X", (s_interrupt_status_register & ~value));
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s_interrupt_status_register = s_interrupt_status_register & (value & REGISTER_WRITE_MASK);
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UpdateCPUInterruptRequest();
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}
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break;
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case 0x04: // I_MASK
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{
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Log_DebugPrintf("Interrupt mask <- 0x%08X", value);
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s_interrupt_mask_register = value & REGISTER_WRITE_MASK;
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UpdateCPUInterruptRequest();
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}
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break;
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default:
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Log_ErrorPrintf("Invalid write at offset 0x%08X", offset);
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break;
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}
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}
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void InterruptController::UpdateCPUInterruptRequest()
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{
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// external interrupts set bit 10 only?
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if ((s_interrupt_status_register & s_interrupt_mask_register) != 0)
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CPU::SetExternalInterrupt(2);
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else
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CPU::ClearExternalInterrupt(2);
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}
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