mirror of
https://github.com/RetroDECK/Duckstation.git
synced 2024-11-23 22:25:42 +00:00
429 lines
11 KiB
C++
429 lines
11 KiB
C++
#pragma once
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#include "common/bitfield.h"
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#include "common/fifo_queue.h"
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#include "system.h"
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#include "types.h"
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#include <array>
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#include <memory>
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class StateWrapper;
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namespace Common {
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class WAVWriter;
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}
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class TimingEvent;
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class SPU
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{
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public:
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enum : u32
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{
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RAM_SIZE = 512 * 1024,
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RAM_MASK = RAM_SIZE - 1,
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};
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SPU();
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~SPU();
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void Initialize();
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void CPUClockChanged();
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void Shutdown();
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void Reset();
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bool DoState(StateWrapper& sw);
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u16 ReadRegister(u32 offset);
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void WriteRegister(u32 offset, u16 value);
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void DMARead(u32* words, u32 word_count);
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void DMAWrite(const u32* words, u32 word_count);
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// Render statistics debug window.
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void DrawDebugStateWindow();
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// Executes the SPU, generating any pending samples.
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void GeneratePendingSamples();
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/// Returns true if currently dumping audio.
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ALWAYS_INLINE bool IsDumpingAudio() const { return static_cast<bool>(m_dump_writer); }
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/// Starts dumping audio to file.
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bool StartDumpingAudio(const char* filename);
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/// Stops dumping audio to file, if started.
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bool StopDumpingAudio();
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/// Access to SPU RAM.
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const std::array<u8, RAM_SIZE>& GetRAM() const { return m_ram; }
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std::array<u8, RAM_SIZE>& GetRAM() { return m_ram; }
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/// Change output stream - used for runahead.
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ALWAYS_INLINE void SetAudioStream(AudioStream* stream) { m_audio_stream = stream; }
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private:
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static constexpr u32 SPU_BASE = 0x1F801C00;
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static constexpr u32 NUM_VOICES = 24;
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static constexpr u32 NUM_VOICE_REGISTERS = 8;
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static constexpr u32 VOICE_ADDRESS_SHIFT = 3;
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static constexpr u32 NUM_SAMPLES_PER_ADPCM_BLOCK = 28;
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static constexpr u32 NUM_SAMPLES_FROM_LAST_ADPCM_BLOCK = 3;
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static constexpr u32 SAMPLE_RATE = 44100;
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static constexpr u32 SYSCLK_TICKS_PER_SPU_TICK = System::MASTER_CLOCK / SAMPLE_RATE; // 0x300
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static constexpr s16 ENVELOPE_MIN_VOLUME = 0;
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static constexpr s16 ENVELOPE_MAX_VOLUME = 0x7FFF;
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static constexpr u32 CAPTURE_BUFFER_SIZE_PER_CHANNEL = 0x400;
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static constexpr u32 MINIMUM_TICKS_BETWEEN_KEY_ON_OFF = 2;
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static constexpr u32 NUM_REVERB_REGS = 32;
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static constexpr u32 FIFO_SIZE_IN_HALFWORDS = 32;
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static constexpr TickCount TRANSFER_TICKS_PER_HALFWORD = 32;
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enum class RAMTransferMode : u8
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{
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Stopped = 0,
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ManualWrite = 1,
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DMAWrite = 2,
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DMARead = 3
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};
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union SPUCNT
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{
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u16 bits;
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BitField<u16, bool, 15, 1> enable;
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BitField<u16, bool, 14, 1> mute_n;
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BitField<u16, u8, 8, 6> noise_clock;
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BitField<u16, bool, 7, 1> reverb_master_enable;
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BitField<u16, bool, 6, 1> irq9_enable;
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BitField<u16, RAMTransferMode, 4, 2> ram_transfer_mode;
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BitField<u16, bool, 3, 1> external_audio_reverb;
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BitField<u16, bool, 2, 1> cd_audio_reverb;
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BitField<u16, bool, 1, 1> external_audio_enable;
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BitField<u16, bool, 0, 1> cd_audio_enable;
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BitField<u16, u8, 0, 6> mode;
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};
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union SPUSTAT
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{
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u16 bits;
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BitField<u16, bool, 11, 1> second_half_capture_buffer;
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BitField<u16, bool, 10, 1> transfer_busy;
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BitField<u16, bool, 9, 1> dma_write_request;
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BitField<u16, bool, 8, 1> dma_read_request;
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BitField<u16, bool, 7, 1> dma_request;
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BitField<u16, bool, 6, 1> irq9_flag;
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BitField<u16, u8, 0, 6> mode;
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};
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union TransferControl
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{
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u16 bits;
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BitField<u8, u8, 1, 3> mode;
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};
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union ADSRRegister
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{
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u32 bits;
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struct
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{
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u16 bits_low;
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u16 bits_high;
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};
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BitField<u32, u8, 0, 4> sustain_level;
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BitField<u32, u8, 4, 4> decay_rate_shr2;
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BitField<u32, u8, 8, 7> attack_rate;
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BitField<u32, bool, 15, 1> attack_exponential;
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BitField<u32, u8, 16, 5> release_rate_shr2;
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BitField<u32, bool, 21, 1> release_exponential;
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BitField<u32, u8, 22, 7> sustain_rate;
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BitField<u32, bool, 30, 1> sustain_direction_decrease;
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BitField<u32, bool, 31, 1> sustain_exponential;
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};
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union VolumeRegister
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{
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u16 bits;
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BitField<u16, bool, 15, 1> sweep_mode;
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BitField<u16, s16, 0, 15> fixed_volume_shr1; // divided by 2
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BitField<u16, bool, 14, 1> sweep_exponential;
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BitField<u16, bool, 13, 1> sweep_direction_decrease;
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BitField<u16, bool, 12, 1> sweep_phase_negative;
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BitField<u16, u8, 0, 7> sweep_rate;
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};
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// organized so we can replace this with a u16 array in the future
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union VoiceRegisters
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{
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u16 index[NUM_VOICE_REGISTERS];
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struct
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{
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VolumeRegister volume_left;
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VolumeRegister volume_right;
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u16 adpcm_sample_rate; // VxPitch
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u16 adpcm_start_address; // multiply by 8
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ADSRRegister adsr;
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s16 adsr_volume;
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u16 adpcm_repeat_address; // multiply by 8
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};
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};
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union VoiceCounter
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{
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// promoted to u32 because of overflow
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u32 bits;
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BitField<u32, u8, 4, 8> interpolation_index;
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BitField<u32, u8, 12, 5> sample_index;
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};
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union ADPCMFlags
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{
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u8 bits;
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BitField<u8, bool, 0, 1> loop_end;
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BitField<u8, bool, 1, 1> loop_repeat;
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BitField<u8, bool, 2, 1> loop_start;
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};
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struct ADPCMBlock
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{
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union
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{
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u8 bits;
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BitField<u8, u8, 0, 4> shift;
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BitField<u8, u8, 4, 3> filter;
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} shift_filter;
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ADPCMFlags flags;
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u8 data[NUM_SAMPLES_PER_ADPCM_BLOCK / 2];
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// For both 4bit and 8bit ADPCM, reserved shift values 13..15 will act same as shift=9).
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u8 GetShift() const
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{
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const u8 shift = shift_filter.shift;
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return (shift > 12) ? 9 : shift;
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}
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u8 GetFilter() const { return std::min<u8>(shift_filter.filter, 4); }
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u8 GetNibble(u32 index) const { return (data[index / 2] >> ((index % 2) * 4)) & 0x0F; }
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};
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struct VolumeEnvelope
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{
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s32 counter;
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u8 rate;
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bool decreasing;
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bool exponential;
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void Reset(u8 rate_, bool decreasing_, bool exponential_);
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s16 Tick(s16 current_level);
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};
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struct VolumeSweep
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{
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VolumeEnvelope envelope;
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bool envelope_active;
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s16 current_level;
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void Reset(VolumeRegister reg);
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void Tick();
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};
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enum class ADSRPhase : u8
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{
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Off = 0,
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Attack = 1,
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Decay = 2,
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Sustain = 3,
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Release = 4
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};
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struct Voice
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{
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u16 current_address;
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VoiceRegisters regs;
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VoiceCounter counter;
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ADPCMFlags current_block_flags;
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bool is_first_block;
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std::array<s16, NUM_SAMPLES_FROM_LAST_ADPCM_BLOCK + NUM_SAMPLES_PER_ADPCM_BLOCK> current_block_samples;
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std::array<s16, 2> adpcm_last_samples;
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s32 last_volume;
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VolumeSweep left_volume;
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VolumeSweep right_volume;
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VolumeEnvelope adsr_envelope;
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ADSRPhase adsr_phase;
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s16 adsr_target;
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bool has_samples;
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bool ignore_loop_address;
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bool IsOn() const { return adsr_phase != ADSRPhase::Off; }
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void KeyOn();
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void KeyOff();
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void ForceOff();
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void DecodeBlock(const ADPCMBlock& block);
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s32 Interpolate() const;
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// Switches to the specified phase, filling in target.
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void UpdateADSREnvelope();
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// Updates the ADSR volume/phase.
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void TickADSR();
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};
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struct ReverbRegisters
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{
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s16 vLOUT;
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s16 vROUT;
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u16 mBASE;
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union
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{
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struct
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{
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u16 FB_SRC_A;
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u16 FB_SRC_B;
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s16 IIR_ALPHA;
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s16 ACC_COEF_A;
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s16 ACC_COEF_B;
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s16 ACC_COEF_C;
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s16 ACC_COEF_D;
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s16 IIR_COEF;
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s16 FB_ALPHA;
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s16 FB_X;
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u16 IIR_DEST_A[2];
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u16 ACC_SRC_A[2];
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u16 ACC_SRC_B[2];
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u16 IIR_SRC_A[2];
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u16 IIR_DEST_B[2];
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u16 ACC_SRC_C[2];
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u16 ACC_SRC_D[2];
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u16 IIR_SRC_B[2];
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u16 MIX_DEST_A[2];
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u16 MIX_DEST_B[2];
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s16 IN_COEF[2];
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};
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u16 rev[NUM_REVERB_REGS];
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};
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};
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static constexpr s32 Clamp16(s32 value) { return (value < -0x8000) ? -0x8000 : (value > 0x7FFF) ? 0x7FFF : value; }
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static constexpr s32 ApplyVolume(s32 sample, s16 volume) { return (sample * s32(volume)) >> 15; }
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static ADSRPhase GetNextADSRPhase(ADSRPhase phase);
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ALWAYS_INLINE bool IsVoiceReverbEnabled(u32 i) const
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{
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return ConvertToBoolUnchecked((m_reverb_on_register >> i) & u32(1));
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}
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ALWAYS_INLINE bool IsVoiceNoiseEnabled(u32 i) const
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{
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return ConvertToBoolUnchecked((m_noise_mode_register >> i) & u32(1));
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}
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ALWAYS_INLINE bool IsPitchModulationEnabled(u32 i) const
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{
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return ((i > 0) && ConvertToBoolUnchecked((m_pitch_modulation_enable_register >> i) & u32(1)));
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}
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ALWAYS_INLINE s16 GetVoiceNoiseLevel() const { return static_cast<s16>(static_cast<u16>(m_noise_level)); }
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u16 ReadVoiceRegister(u32 offset);
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void WriteVoiceRegister(u32 offset, u16 value);
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ALWAYS_INLINE bool IsRAMIRQTriggerable() const { return m_SPUCNT.irq9_enable && !m_SPUSTAT.irq9_flag; }
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ALWAYS_INLINE bool CheckRAMIRQ(u32 address) const { return ((ZeroExtend32(m_irq_address) * 8) == address); }
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void TriggerRAMIRQ();
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void CheckForLateRAMIRQs();
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void WriteToCaptureBuffer(u32 index, s16 value);
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void IncrementCaptureBufferPosition();
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void ReadADPCMBlock(u16 address, ADPCMBlock* block);
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std::tuple<s32, s32> SampleVoice(u32 voice_index);
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void UpdateNoise();
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u32 ReverbMemoryAddress(u32 address) const;
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s16 ReverbRead(u32 address, s32 offset = 0);
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void ReverbWrite(u32 address, s16 data);
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void ProcessReverb(s16 left_in, s16 right_in, s32* left_out, s32* right_out);
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void Execute(TickCount ticks);
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void UpdateEventInterval();
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void ExecuteFIFOWriteToRAM(TickCount& ticks);
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void ExecuteFIFOReadFromRAM(TickCount& ticks);
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void ExecuteTransfer(TickCount ticks);
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void ManualTransferWrite(u16 value);
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void UpdateTransferEvent();
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void UpdateDMARequest();
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std::unique_ptr<TimingEvent> m_tick_event;
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std::unique_ptr<TimingEvent> m_transfer_event;
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std::unique_ptr<Common::WAVWriter> m_dump_writer;
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AudioStream* m_audio_stream = nullptr;
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TickCount m_ticks_carry = 0;
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TickCount m_cpu_ticks_per_spu_tick = 0;
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TickCount m_cpu_tick_divider = 0;
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SPUCNT m_SPUCNT = {};
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SPUSTAT m_SPUSTAT = {};
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TransferControl m_transfer_control = {};
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u16 m_transfer_address_reg = 0;
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u32 m_transfer_address = 0;
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u16 m_irq_address = 0;
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u16 m_capture_buffer_position = 0;
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VolumeRegister m_main_volume_left_reg = {};
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VolumeRegister m_main_volume_right_reg = {};
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VolumeSweep m_main_volume_left = {};
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VolumeSweep m_main_volume_right = {};
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s16 m_cd_audio_volume_left = 0;
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s16 m_cd_audio_volume_right = 0;
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s16 m_external_volume_left = 0;
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s16 m_external_volume_right = 0;
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u32 m_key_on_register = 0;
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u32 m_key_off_register = 0;
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u32 m_endx_register = 0;
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u32 m_pitch_modulation_enable_register = 0;
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u32 m_noise_mode_register = 0;
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u32 m_noise_count = 0;
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u32 m_noise_level = 0;
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u32 m_reverb_on_register = 0;
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u32 m_reverb_base_address = 0;
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u32 m_reverb_current_address = 0;
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ReverbRegisters m_reverb_registers{};
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std::array<std::array<s16, 128>, 2> m_reverb_downsample_buffer;
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std::array<std::array<s16, 64>, 2> m_reverb_upsample_buffer;
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s32 m_reverb_resample_buffer_position = 0;
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std::array<Voice, NUM_VOICES> m_voices{};
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InlineFIFOQueue<u16, FIFO_SIZE_IN_HALFWORDS> m_transfer_fifo;
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std::array<u8, RAM_SIZE> m_ram{};
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};
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extern SPU g_spu; |