mirror of
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509 lines
24 KiB
C++
509 lines
24 KiB
C++
// Copyright 2018, VIXL authors
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// * Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// * Neither the name of ARM Limited nor the names of its contributors may be
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// used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef VIXL_CPU_FEATURES_H
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#define VIXL_CPU_FEATURES_H
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#include <bitset>
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#include <ostream>
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#include "globals-vixl.h"
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namespace vixl {
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// VIXL aims to handle and detect all architectural features that are likely to
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// influence code-generation decisions at EL0 (user-space).
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//
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// - There may be multiple VIXL feature flags for a given architectural
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// extension. This occurs where the extension allow components to be
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// implemented independently, or where kernel support is needed, and is likely
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// to be fragmented.
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//
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// For example, Pointer Authentication (kPAuth*) has a separate feature flag
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// for access to PACGA, and to indicate that the QARMA algorithm is
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// implemented.
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//
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// - Conversely, some extensions have configuration options that do not affect
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// EL0, so these are presented as a single VIXL feature.
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//
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// For example, the RAS extension (kRAS) has several variants, but the only
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// feature relevant to VIXL is the addition of the ESB instruction so we only
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// need a single flag.
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//
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// - VIXL offers separate flags for separate features even if they're
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// architecturally linked.
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//
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// For example, the architecture requires kFPHalf and kNEONHalf to be equal,
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// but they have separate hardware ID register fields so VIXL presents them as
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// separate features.
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//
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// - VIXL can detect every feature for which it can generate code.
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//
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// - VIXL can detect some features for which it cannot generate code.
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//
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// The CPUFeatures::Feature enum — derived from the macro list below — is
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// frequently extended. New features may be added to the list at any point, and
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// no assumptions should be made about the numerical values assigned to each
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// enum constant. The symbolic names can be considered to be stable.
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//
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// The debug descriptions are used only for debug output. The 'cpuinfo' strings
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// are informative; VIXL does not use /proc/cpuinfo for feature detection.
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// clang-format off
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#define VIXL_CPU_FEATURE_LIST(V) \
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/* If set, the OS traps and emulates MRS accesses to relevant (EL1) ID_* */ \
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/* registers, so that the detailed feature registers can be read */ \
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/* directly. */ \
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\
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/* Constant name Debug description Linux 'cpuinfo' string. */ \
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V(kIDRegisterEmulation, "ID register emulation", "cpuid") \
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\
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V(kFP, "FP", "fp") \
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V(kNEON, "NEON", "asimd") \
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V(kCRC32, "CRC32", "crc32") \
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V(kDGH, "DGH", "dgh") \
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/* Speculation control features. */ \
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V(kCSV2, "CSV2", NULL) \
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V(kSCXTNUM, "SCXTNUM", NULL) \
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V(kCSV3, "CSV3", NULL) \
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V(kSB, "SB", "sb") \
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V(kSPECRES, "SPECRES", NULL) \
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V(kSSBS, "SSBS", NULL) \
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V(kSSBSControl, "SSBS (PSTATE control)", "ssbs") \
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/* Cryptographic support instructions. */ \
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V(kAES, "AES", "aes") \
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V(kSHA1, "SHA1", "sha1") \
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V(kSHA2, "SHA2", "sha2") \
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/* A form of PMULL{2} with a 128-bit (1Q) result. */ \
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V(kPmull1Q, "Pmull1Q", "pmull") \
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/* Atomic operations on memory: CAS, LDADD, STADD, SWP, etc. */ \
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V(kAtomics, "Atomics", "atomics") \
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/* Limited ordering regions: LDLAR, STLLR and their variants. */ \
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V(kLORegions, "LORegions", NULL) \
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/* Rounding doubling multiply add/subtract: SQRDMLAH and SQRDMLSH. */ \
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V(kRDM, "RDM", "asimdrdm") \
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/* Scalable Vector Extension. */ \
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V(kSVE, "SVE", "sve") \
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V(kSVEF64MM, "SVE F64MM", "svef64mm") \
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V(kSVEF32MM, "SVE F32MM", "svef32mm") \
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V(kSVEI8MM, "SVE I8MM", "svei8imm") \
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V(kSVEBF16, "SVE BFloat16", "svebf16") \
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/* SDOT and UDOT support (in NEON). */ \
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V(kDotProduct, "DotProduct", "asimddp") \
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/* Int8 matrix multiplication (in NEON). */ \
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V(kI8MM, "NEON I8MM", "i8mm") \
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/* Half-precision (FP16) support for FP and NEON, respectively. */ \
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V(kFPHalf, "FPHalf", "fphp") \
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V(kNEONHalf, "NEONHalf", "asimdhp") \
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/* BFloat16 support (in both FP and NEON.) */ \
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V(kBF16, "FP/NEON BFloat 16", "bf16") \
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/* The RAS extension, including the ESB instruction. */ \
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V(kRAS, "RAS", NULL) \
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/* Data cache clean to the point of persistence: DC CVAP. */ \
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V(kDCPoP, "DCPoP", "dcpop") \
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/* Data cache clean to the point of deep persistence: DC CVADP. */ \
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V(kDCCVADP, "DCCVADP", "dcpodp") \
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/* Cryptographic support instructions. */ \
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V(kSHA3, "SHA3", "sha3") \
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V(kSHA512, "SHA512", "sha512") \
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V(kSM3, "SM3", "sm3") \
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V(kSM4, "SM4", "sm4") \
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/* Pointer authentication for addresses. */ \
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V(kPAuth, "PAuth", "paca") \
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/* Pointer authentication for addresses uses QARMA. */ \
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V(kPAuthQARMA, "PAuthQARMA", NULL) \
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/* Generic authentication (using the PACGA instruction). */ \
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V(kPAuthGeneric, "PAuthGeneric", "pacg") \
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/* Generic authentication uses QARMA. */ \
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V(kPAuthGenericQARMA, "PAuthGenericQARMA", NULL) \
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/* JavaScript-style FP -> integer conversion instruction: FJCVTZS. */ \
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V(kJSCVT, "JSCVT", "jscvt") \
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/* Complex number support for NEON: FCMLA and FCADD. */ \
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V(kFcma, "Fcma", "fcma") \
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/* RCpc-based model (for weaker release consistency): LDAPR and variants. */ \
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V(kRCpc, "RCpc", "lrcpc") \
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V(kRCpcImm, "RCpc (imm)", "ilrcpc") \
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/* Flag manipulation instructions: SETF{8,16}, CFINV, RMIF. */ \
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V(kFlagM, "FlagM", "flagm") \
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/* Unaligned single-copy atomicity. */ \
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V(kUSCAT, "USCAT", "uscat") \
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/* FP16 fused multiply-add or -subtract long: FMLAL{2}, FMLSL{2}. */ \
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V(kFHM, "FHM", "asimdfhm") \
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/* Data-independent timing (for selected instructions). */ \
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V(kDIT, "DIT", "dit") \
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/* Branch target identification. */ \
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V(kBTI, "BTI", "bti") \
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/* Flag manipulation instructions: {AX,XA}FLAG */ \
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V(kAXFlag, "AXFlag", "flagm2") \
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/* Random number generation extension, */ \
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V(kRNG, "RNG", "rng") \
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/* Floating-point round to {32,64}-bit integer. */ \
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V(kFrintToFixedSizedInt,"Frint (bounded)", "frint") \
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/* Memory Tagging Extension. */ \
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V(kMTEInstructions, "MTE (EL0 instructions)", NULL) \
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V(kMTE, "MTE", NULL) \
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V(kMTE3, "MTE (asymmetric)", "mte3") \
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/* PAuth extensions. */ \
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V(kPAuthEnhancedPAC, "PAuth EnhancedPAC", NULL) \
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V(kPAuthEnhancedPAC2, "PAuth EnhancedPAC2", NULL) \
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V(kPAuthFPAC, "PAuth FPAC", NULL) \
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V(kPAuthFPACCombined, "PAuth FPACCombined", NULL) \
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/* Scalable Vector Extension 2. */ \
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V(kSVE2, "SVE2", "sve2") \
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V(kSVESM4, "SVE SM4", "svesm4") \
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V(kSVESHA3, "SVE SHA3", "svesha3") \
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V(kSVEBitPerm, "SVE BitPerm", "svebitperm") \
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V(kSVEAES, "SVE AES", "sveaes") \
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V(kSVEPmull128, "SVE Pmull128", "svepmull") \
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/* Alternate floating-point behavior */ \
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V(kAFP, "AFP", "afp") \
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/* Enhanced Counter Virtualization */ \
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V(kECV, "ECV", "ecv") \
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/* Increased precision of Reciprocal Estimate and Square Root Estimate */ \
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V(kRPRES, "RPRES", "rpres") \
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/* Memory operation instructions, for memcpy, memset */ \
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V(kMOPS, "Memory ops", NULL) \
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/* Scalable Matrix Extension (SME) */ \
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V(kSME, "SME", "sme") \
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V(kSMEi16i64, "SME (i16i64)", "smei16i64") \
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V(kSMEf64f64, "SME (f64f64)", "smef64f64") \
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V(kSMEi8i32, "SME (i8i32)", "smei8i32") \
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V(kSMEf16f32, "SME (f16f32)", "smef16f32") \
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V(kSMEb16f32, "SME (b16f32)", "smeb16f32") \
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V(kSMEf32f32, "SME (f32f32)", "smef32f32") \
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V(kSMEfa64, "SME (fa64)", "smefa64") \
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/* WFET and WFIT instruction support */ \
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V(kWFXT, "WFXT", "wfxt") \
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/* Extended BFloat16 instructions */ \
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V(kEBF16, "EBF16", "ebf16") \
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V(kSVE_EBF16, "EBF16 (SVE)", "sveebf16") \
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V(kCSSC, "CSSC", "cssc")
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// clang-format on
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class CPUFeaturesConstIterator;
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// A representation of the set of features known to be supported by the target
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// device. Each feature is represented by a simple boolean flag.
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//
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// - When the Assembler is asked to assemble an instruction, it asserts (in
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// debug mode) that the necessary features are available.
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//
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// - TODO: The MacroAssembler relies on the Assembler's assertions, but in
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// some cases it may be useful for macros to generate a fall-back sequence
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// in case features are not available.
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//
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// - The Simulator assumes by default that all features are available, but it
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// is possible to configure it to fail if the simulated code uses features
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// that are not enabled.
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//
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// The Simulator also offers pseudo-instructions to allow features to be
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// enabled and disabled dynamically. This is useful when you want to ensure
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// that some features are constrained to certain areas of code.
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//
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// - The base Disassembler knows nothing about CPU features, but the
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// PrintDisassembler can be configured to annotate its output with warnings
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// about unavailable features. The Simulator uses this feature when
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// instruction trace is enabled.
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//
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// - The Decoder-based components -- the Simulator and PrintDisassembler --
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// rely on a CPUFeaturesAuditor visitor. This visitor keeps a list of
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// features actually encountered so that a large block of code can be
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// examined (either directly or through simulation), and the required
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// features analysed later.
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//
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// Expected usage:
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//
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// // By default, VIXL uses CPUFeatures::AArch64LegacyBaseline(), for
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// // compatibility with older version of VIXL.
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// MacroAssembler masm;
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//
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// // Generate code only for the current CPU.
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// masm.SetCPUFeatures(CPUFeatures::InferFromOS());
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//
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// // Turn off feature checking entirely.
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// masm.SetCPUFeatures(CPUFeatures::All());
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//
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// Feature set manipulation:
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//
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// CPUFeatures f; // The default constructor gives an empty set.
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// // Individual features can be added (or removed).
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// f.Combine(CPUFeatures::kFP, CPUFeatures::kNEON, CPUFeatures::AES);
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// f.Remove(CPUFeatures::kNEON);
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//
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// // Some helpers exist for extensions that provide several features.
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// f.Remove(CPUFeatures::All());
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// f.Combine(CPUFeatures::AArch64LegacyBaseline());
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//
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// // Chained construction is also possible.
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// CPUFeatures g =
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// f.With(CPUFeatures::kPmull1Q).Without(CPUFeatures::kCRC32);
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//
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// // Features can be queried. Where multiple features are given, they are
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// // combined with logical AND.
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// if (h.Has(CPUFeatures::kNEON)) { ... }
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// if (h.Has(CPUFeatures::kFP, CPUFeatures::kNEON)) { ... }
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// if (h.Has(g)) { ... }
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// // If the empty set is requested, the result is always 'true'.
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// VIXL_ASSERT(h.Has(CPUFeatures()));
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//
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// // For debug and reporting purposes, features can be enumerated (or
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// // printed directly):
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// std::cout << CPUFeatures::kNEON; // Prints something like "NEON".
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// std::cout << f; // Prints something like "FP, NEON, CRC32".
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class CPUFeatures {
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public:
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// clang-format off
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// Individual features.
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// These should be treated as opaque tokens. User code should not rely on
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// specific numeric values or ordering.
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enum Feature {
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// Refer to VIXL_CPU_FEATURE_LIST (above) for the list of feature names that
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// this class supports.
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kNone = -1,
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#define VIXL_DECLARE_FEATURE(SYMBOL, NAME, CPUINFO) SYMBOL,
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VIXL_CPU_FEATURE_LIST(VIXL_DECLARE_FEATURE)
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#undef VIXL_DECLARE_FEATURE
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kNumberOfFeatures
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};
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// clang-format on
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// By default, construct with no features enabled.
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CPUFeatures() : features_{} {}
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// Construct with some features already enabled.
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template <typename T, typename... U>
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CPUFeatures(T first, U... others) : features_{} {
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Combine(first, others...);
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}
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// Construct with all features enabled. This can be used to disable feature
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// checking: `Has(...)` returns true regardless of the argument.
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static CPUFeatures All();
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// Construct an empty CPUFeatures. This is equivalent to the default
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// constructor, but is provided for symmetry and convenience.
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static CPUFeatures None() { return CPUFeatures(); }
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// The presence of these features was assumed by version of VIXL before this
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// API was added, so using this set by default ensures API compatibility.
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static CPUFeatures AArch64LegacyBaseline() {
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return CPUFeatures(kFP, kNEON, kCRC32);
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}
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// Construct a new CPUFeatures object using ID registers. This assumes that
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// kIDRegisterEmulation is present.
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static CPUFeatures InferFromIDRegisters();
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enum QueryIDRegistersOption {
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kDontQueryIDRegisters,
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kQueryIDRegistersIfAvailable
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};
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// Construct a new CPUFeatures object based on what the OS reports.
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static CPUFeatures InferFromOS(
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QueryIDRegistersOption option = kQueryIDRegistersIfAvailable);
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// Combine another CPUFeatures object into this one. Features that already
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// exist in this set are left unchanged.
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void Combine(const CPUFeatures& other);
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// Combine a specific feature into this set. If it already exists in the set,
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// the set is left unchanged.
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void Combine(Feature feature);
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// Combine multiple features (or feature sets) into this set.
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template <typename T, typename... U>
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void Combine(T first, U... others) {
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Combine(first);
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Combine(others...);
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}
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// Remove features in another CPUFeatures object from this one.
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void Remove(const CPUFeatures& other);
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// Remove a specific feature from this set. This has no effect if the feature
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// doesn't exist in the set.
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void Remove(Feature feature0);
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// Remove multiple features (or feature sets) from this set.
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template <typename T, typename... U>
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void Remove(T first, U... others) {
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Remove(first);
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Remove(others...);
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}
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// Chaining helpers for convenient construction by combining other CPUFeatures
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// or individual Features.
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template <typename... T>
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CPUFeatures With(T... others) const {
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CPUFeatures f(*this);
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f.Combine(others...);
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return f;
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}
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template <typename... T>
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CPUFeatures Without(T... others) const {
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CPUFeatures f(*this);
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f.Remove(others...);
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return f;
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}
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// Test whether the `other` feature set is equal to or a subset of this one.
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bool Has(const CPUFeatures& other) const;
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// Test whether a single feature exists in this set.
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// Note that `Has(kNone)` always returns true.
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bool Has(Feature feature) const;
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// Test whether all of the specified features exist in this set.
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template <typename T, typename... U>
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bool Has(T first, U... others) const {
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return Has(first) && Has(others...);
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}
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// Return the number of enabled features.
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size_t Count() const;
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bool HasNoFeatures() const { return Count() == 0; }
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// Check for equivalence.
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bool operator==(const CPUFeatures& other) const {
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return Has(other) && other.Has(*this);
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}
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bool operator!=(const CPUFeatures& other) const { return !(*this == other); }
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typedef CPUFeaturesConstIterator const_iterator;
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const_iterator begin() const;
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const_iterator end() const;
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private:
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// Each bit represents a feature. This set will be extended as needed.
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std::bitset<kNumberOfFeatures> features_;
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friend std::ostream& operator<<(std::ostream& os,
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const vixl::CPUFeatures& features);
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};
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std::ostream& operator<<(std::ostream& os, vixl::CPUFeatures::Feature feature);
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std::ostream& operator<<(std::ostream& os, const vixl::CPUFeatures& features);
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// This is not a proper C++ iterator type, but it simulates enough of
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// ForwardIterator that simple loops can be written.
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class CPUFeaturesConstIterator {
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public:
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CPUFeaturesConstIterator(const CPUFeatures* cpu_features = NULL,
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CPUFeatures::Feature start = CPUFeatures::kNone)
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: cpu_features_(cpu_features), feature_(start) {
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VIXL_ASSERT(IsValid());
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}
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bool operator==(const CPUFeaturesConstIterator& other) const;
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bool operator!=(const CPUFeaturesConstIterator& other) const {
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return !(*this == other);
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}
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CPUFeaturesConstIterator& operator++();
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CPUFeaturesConstIterator operator++(int);
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CPUFeatures::Feature operator*() const {
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VIXL_ASSERT(IsValid());
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return feature_;
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}
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// For proper support of C++'s simplest "Iterator" concept, this class would
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// have to define member types (such as CPUFeaturesIterator::pointer) to make
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// it appear as if it iterates over Feature objects in memory. That is, we'd
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// need CPUFeatures::iterator to behave like std::vector<Feature>::iterator.
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// This is at least partially possible -- the std::vector<bool> specialisation
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|
// does something similar -- but it doesn't seem worthwhile for a
|
|
// special-purpose debug helper, so they are omitted here.
|
|
private:
|
|
const CPUFeatures* cpu_features_;
|
|
CPUFeatures::Feature feature_;
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|
|
|
bool IsValid() const {
|
|
if (cpu_features_ == NULL) {
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|
return feature_ == CPUFeatures::kNone;
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|
}
|
|
return cpu_features_->Has(feature_);
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|
}
|
|
};
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|
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// A convenience scope for temporarily modifying a CPU features object. This
|
|
// allows features to be enabled for short sequences.
|
|
//
|
|
// Expected usage:
|
|
//
|
|
// {
|
|
// CPUFeaturesScope cpu(&masm, CPUFeatures::kCRC32);
|
|
// // This scope can now use CRC32, as well as anything else that was enabled
|
|
// // before the scope.
|
|
//
|
|
// ...
|
|
//
|
|
// // At the end of the scope, the original CPU features are restored.
|
|
// }
|
|
class CPUFeaturesScope {
|
|
public:
|
|
// Start a CPUFeaturesScope on any object that implements
|
|
// `CPUFeatures* GetCPUFeatures()`.
|
|
template <typename T>
|
|
explicit CPUFeaturesScope(T* cpu_features_wrapper)
|
|
: cpu_features_(cpu_features_wrapper->GetCPUFeatures()),
|
|
old_features_(*cpu_features_) {}
|
|
|
|
// Start a CPUFeaturesScope on any object that implements
|
|
// `CPUFeatures* GetCPUFeatures()`, with the specified features enabled.
|
|
template <typename T, typename U, typename... V>
|
|
CPUFeaturesScope(T* cpu_features_wrapper, U first, V... features)
|
|
: cpu_features_(cpu_features_wrapper->GetCPUFeatures()),
|
|
old_features_(*cpu_features_) {
|
|
cpu_features_->Combine(first, features...);
|
|
}
|
|
|
|
~CPUFeaturesScope() { *cpu_features_ = old_features_; }
|
|
|
|
// For advanced usage, the CPUFeatures object can be accessed directly.
|
|
// The scope will restore the original state when it ends.
|
|
|
|
CPUFeatures* GetCPUFeatures() const { return cpu_features_; }
|
|
|
|
void SetCPUFeatures(const CPUFeatures& cpu_features) {
|
|
*cpu_features_ = cpu_features;
|
|
}
|
|
|
|
private:
|
|
CPUFeatures* const cpu_features_;
|
|
const CPUFeatures old_features_;
|
|
};
|
|
|
|
|
|
} // namespace vixl
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|
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|
#endif // VIXL_CPU_FEATURES_H
|