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365 lines
16 KiB
C++
365 lines
16 KiB
C++
// Copyright 2018, VIXL authors
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// * Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// * Neither the name of ARM Limited nor the names of its contributors may be
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// used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef VIXL_CPU_FEATURES_H
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#define VIXL_CPU_FEATURES_H
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#include <ostream>
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#include "globals-vixl.h"
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namespace vixl {
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// clang-format off
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#define VIXL_CPU_FEATURE_LIST(V) \
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/* If set, the OS traps and emulates MRS accesses to relevant (EL1) ID_* */ \
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/* registers, so that the detailed feature registers can be read */ \
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/* directly. */ \
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V(kIDRegisterEmulation, "ID register emulation", "cpuid") \
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\
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V(kFP, "FP", "fp") \
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V(kNEON, "NEON", "asimd") \
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V(kCRC32, "CRC32", "crc32") \
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/* Cryptographic support instructions. */ \
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V(kAES, "AES", "aes") \
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V(kSHA1, "SHA1", "sha1") \
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V(kSHA2, "SHA2", "sha2") \
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/* A form of PMULL{2} with a 128-bit (1Q) result. */ \
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V(kPmull1Q, "Pmull1Q", "pmull") \
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/* Atomic operations on memory: CAS, LDADD, STADD, SWP, etc. */ \
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V(kAtomics, "Atomics", "atomics") \
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/* Limited ordering regions: LDLAR, STLLR and their variants. */ \
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V(kLORegions, "LORegions", NULL) \
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/* Rounding doubling multiply add/subtract: SQRDMLAH and SQRDMLSH. */ \
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V(kRDM, "RDM", "asimdrdm") \
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/* SDOT and UDOT support (in NEON). */ \
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V(kDotProduct, "DotProduct", "asimddp") \
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/* Half-precision (FP16) support for FP and NEON, respectively. */ \
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V(kFPHalf, "FPHalf", "fphp") \
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V(kNEONHalf, "NEONHalf", "asimdhp") \
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/* The RAS extension, including the ESB instruction. */ \
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V(kRAS, "RAS", NULL) \
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/* Data cache clean to the point of persistence: DC CVAP. */ \
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V(kDCPoP, "DCPoP", "dcpop") \
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/* Cryptographic support instructions. */ \
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V(kSHA3, "SHA3", "sha3") \
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V(kSHA512, "SHA512", "sha512") \
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V(kSM3, "SM3", "sm3") \
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V(kSM4, "SM4", "sm4") \
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/* Pointer authentication for addresses. */ \
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V(kPAuth, "PAuth", NULL) \
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/* Pointer authentication for addresses uses QARMA. */ \
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V(kPAuthQARMA, "PAuthQARMA", NULL) \
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/* Generic authentication (using the PACGA instruction). */ \
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V(kPAuthGeneric, "PAuthGeneric", NULL) \
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/* Generic authentication uses QARMA. */ \
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V(kPAuthGenericQARMA, "PAuthGenericQARMA", NULL) \
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/* JavaScript-style FP <-> integer conversion instruction: FJCVTZS. */ \
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V(kJSCVT, "JSCVT", "jscvt") \
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/* RCpc-based model (for weaker release consistency): LDAPR and variants. */ \
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V(kRCpc, "RCpc", "lrcpc") \
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/* Complex number support for NEON: FCMLA and FCADD. */ \
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V(kFcma, "Fcma", "fcma")
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// clang-format on
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class CPUFeaturesConstIterator;
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// A representation of the set of features known to be supported by the target
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// device. Each feature is represented by a simple boolean flag.
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//
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// - When the Assembler is asked to assemble an instruction, it asserts (in
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// debug mode) that the necessary features are available.
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//
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// - TODO: The MacroAssembler relies on the Assembler's assertions, but in
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// some cases it may be useful for macros to generate a fall-back sequence
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// in case features are not available.
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//
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// - The Simulator assumes by default that all features are available, but it
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// is possible to configure it to fail if the simulated code uses features
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// that are not enabled.
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//
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// The Simulator also offers pseudo-instructions to allow features to be
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// enabled and disabled dynamically. This is useful when you want to ensure
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// that some features are constrained to certain areas of code.
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//
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// - The base Disassembler knows nothing about CPU features, but the
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// PrintDisassembler can be configured to annotate its output with warnings
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// about unavailable features. The Simulator uses this feature when
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// instruction trace is enabled.
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//
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// - The Decoder-based components -- the Simulator and PrintDisassembler --
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// rely on a CPUFeaturesAuditor visitor. This visitor keeps a list of
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// features actually encountered so that a large block of code can be
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// examined (either directly or through simulation), and the required
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// features analysed later.
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//
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// Expected usage:
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//
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// // By default, VIXL uses CPUFeatures::AArch64LegacyBaseline(), for
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// // compatibility with older version of VIXL.
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// MacroAssembler masm;
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//
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// // Generate code only for the current CPU.
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// masm.SetCPUFeatures(CPUFeatures::InferFromOS());
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//
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// // Turn off feature checking entirely.
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// masm.SetCPUFeatures(CPUFeatures::All());
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//
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// Feature set manipulation:
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//
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// CPUFeatures f; // The default constructor gives an empty set.
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// // Individual features can be added (or removed).
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// f.Combine(CPUFeatures::kFP, CPUFeatures::kNEON, CPUFeatures::AES);
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// f.Remove(CPUFeatures::kNEON);
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//
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// // Some helpers exist for extensions that provide several features.
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// f.Remove(CPUFeatures::All());
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// f.Combine(CPUFeatures::AArch64LegacyBaseline());
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//
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// // Chained construction is also possible.
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// CPUFeatures g =
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// f.With(CPUFeatures::kPmull1Q).Without(CPUFeatures::kCRC32);
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//
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// // Features can be queried. Where multiple features are given, they are
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// // combined with logical AND.
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// if (h.Has(CPUFeatures::kNEON)) { ... }
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// if (h.Has(CPUFeatures::kFP, CPUFeatures::kNEON)) { ... }
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// if (h.Has(g)) { ... }
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// // If the empty set is requested, the result is always 'true'.
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// VIXL_ASSERT(h.Has(CPUFeatures()));
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//
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// // For debug and reporting purposes, features can be enumerated (or
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// // printed directly):
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// std::cout << CPUFeatures::kNEON; // Prints something like "NEON".
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// std::cout << f; // Prints something like "FP, NEON, CRC32".
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class CPUFeatures {
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public:
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// clang-format off
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// Individual features.
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// These should be treated as opaque tokens. User code should not rely on
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// specific numeric values or ordering.
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enum Feature {
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// Refer to VIXL_CPU_FEATURE_LIST (above) for the list of feature names that
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// this class supports.
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kNone = -1,
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#define VIXL_DECLARE_FEATURE(SYMBOL, NAME, CPUINFO) SYMBOL,
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VIXL_CPU_FEATURE_LIST(VIXL_DECLARE_FEATURE)
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#undef VIXL_DECLARE_FEATURE
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kNumberOfFeatures
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};
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// clang-format on
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// By default, construct with no features enabled.
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CPUFeatures() : features_(0) {}
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// Construct with some features already enabled.
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CPUFeatures(Feature feature0,
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Feature feature1 = kNone,
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Feature feature2 = kNone,
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Feature feature3 = kNone);
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// Construct with all features enabled. This can be used to disable feature
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// checking: `Has(...)` returns true regardless of the argument.
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static CPUFeatures All();
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// Construct an empty CPUFeatures. This is equivalent to the default
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// constructor, but is provided for symmetry and convenience.
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static CPUFeatures None() { return CPUFeatures(); }
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// The presence of these features was assumed by version of VIXL before this
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// API was added, so using this set by default ensures API compatibility.
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static CPUFeatures AArch64LegacyBaseline() {
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return CPUFeatures(kFP, kNEON, kCRC32);
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}
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// Construct a new CPUFeatures object based on what the OS reports.
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static CPUFeatures InferFromOS();
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// Combine another CPUFeatures object into this one. Features that already
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// exist in this set are left unchanged.
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void Combine(const CPUFeatures& other);
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// Combine specific features into this set. Features that already exist in
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// this set are left unchanged.
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void Combine(Feature feature0,
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Feature feature1 = kNone,
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Feature feature2 = kNone,
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Feature feature3 = kNone);
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// Remove features in another CPUFeatures object from this one.
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void Remove(const CPUFeatures& other);
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// Remove specific features from this set.
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void Remove(Feature feature0,
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Feature feature1 = kNone,
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Feature feature2 = kNone,
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Feature feature3 = kNone);
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// Chaining helpers for convenient construction.
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CPUFeatures With(const CPUFeatures& other) const;
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CPUFeatures With(Feature feature0,
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Feature feature1 = kNone,
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Feature feature2 = kNone,
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Feature feature3 = kNone) const;
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CPUFeatures Without(const CPUFeatures& other) const;
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CPUFeatures Without(Feature feature0,
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Feature feature1 = kNone,
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Feature feature2 = kNone,
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Feature feature3 = kNone) const;
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// Query features.
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// Note that an empty query (like `Has(kNone)`) always returns true.
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bool Has(const CPUFeatures& other) const;
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bool Has(Feature feature0,
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Feature feature1 = kNone,
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Feature feature2 = kNone,
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Feature feature3 = kNone) const;
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// Return the number of enabled features.
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size_t Count() const;
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// Check for equivalence.
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bool operator==(const CPUFeatures& other) const {
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return Has(other) && other.Has(*this);
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}
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bool operator!=(const CPUFeatures& other) const { return !(*this == other); }
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typedef CPUFeaturesConstIterator const_iterator;
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const_iterator begin() const;
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const_iterator end() const;
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private:
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// Each bit represents a feature. This field will be replaced as needed if
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// features are added.
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uint64_t features_;
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friend std::ostream& operator<<(std::ostream& os,
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const vixl::CPUFeatures& features);
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};
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std::ostream& operator<<(std::ostream& os, vixl::CPUFeatures::Feature feature);
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std::ostream& operator<<(std::ostream& os, const vixl::CPUFeatures& features);
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// This is not a proper C++ iterator type, but it simulates enough of
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// ForwardIterator that simple loops can be written.
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class CPUFeaturesConstIterator {
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public:
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CPUFeaturesConstIterator(const CPUFeatures* cpu_features = NULL,
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CPUFeatures::Feature start = CPUFeatures::kNone)
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: cpu_features_(cpu_features), feature_(start) {
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VIXL_ASSERT(IsValid());
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}
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bool operator==(const CPUFeaturesConstIterator& other) const;
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bool operator!=(const CPUFeaturesConstIterator& other) const {
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return !(*this == other);
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}
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CPUFeatures::Feature operator++();
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CPUFeatures::Feature operator++(int);
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CPUFeatures::Feature operator*() const {
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VIXL_ASSERT(IsValid());
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return feature_;
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}
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// For proper support of C++'s simplest "Iterator" concept, this class would
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// have to define member types (such as CPUFeaturesIterator::pointer) to make
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// it appear as if it iterates over Feature objects in memory. That is, we'd
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// need CPUFeatures::iterator to behave like std::vector<Feature>::iterator.
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// This is at least partially possible -- the std::vector<bool> specialisation
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// does something similar -- but it doesn't seem worthwhile for a
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// special-purpose debug helper, so they are omitted here.
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private:
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const CPUFeatures* cpu_features_;
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CPUFeatures::Feature feature_;
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bool IsValid() const {
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return ((cpu_features_ == NULL) && (feature_ == CPUFeatures::kNone)) ||
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cpu_features_->Has(feature_);
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}
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};
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// A convenience scope for temporarily modifying a CPU features object. This
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// allows features to be enabled for short sequences.
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//
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// Expected usage:
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//
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// {
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// CPUFeaturesScope cpu(&masm, CPUFeatures::kCRC32);
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// // This scope can now use CRC32, as well as anything else that was enabled
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// // before the scope.
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//
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// ...
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//
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// // At the end of the scope, the original CPU features are restored.
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// }
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class CPUFeaturesScope {
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public:
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// Start a CPUFeaturesScope on any object that implements
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// `CPUFeatures* GetCPUFeatures()`.
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template <typename T>
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explicit CPUFeaturesScope(T* cpu_features_wrapper,
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CPUFeatures::Feature feature0 = CPUFeatures::kNone,
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CPUFeatures::Feature feature1 = CPUFeatures::kNone,
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CPUFeatures::Feature feature2 = CPUFeatures::kNone,
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CPUFeatures::Feature feature3 = CPUFeatures::kNone)
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: cpu_features_(cpu_features_wrapper->GetCPUFeatures()),
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old_features_(*cpu_features_) {
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cpu_features_->Combine(feature0, feature1, feature2, feature3);
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}
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template <typename T>
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CPUFeaturesScope(T* cpu_features_wrapper, const CPUFeatures& other)
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: cpu_features_(cpu_features_wrapper->GetCPUFeatures()),
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old_features_(*cpu_features_) {
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cpu_features_->Combine(other);
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}
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~CPUFeaturesScope() { *cpu_features_ = old_features_; }
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// For advanced usage, the CPUFeatures object can be accessed directly.
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// The scope will restore the original state when it ends.
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CPUFeatures* GetCPUFeatures() const { return cpu_features_; }
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void SetCPUFeatures(const CPUFeatures& cpu_features) {
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*cpu_features_ = cpu_features;
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}
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private:
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CPUFeatures* const cpu_features_;
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const CPUFeatures old_features_;
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};
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} // namespace vixl
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#endif // VIXL_CPU_FEATURES_H
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