Duckstation/src/core/sio.cpp
Connor McLaughlin b6f871d2b9
JIT optimizations and refactoring (#675)
* CPU/Recompiler: Use rel32 call where possible for no-args

* JitCodeBuffer: Support using preallocated buffer

* CPU/Recompiler/AArch64: Use bl instead of blr for short branches

* CPU/CodeCache: Allocate recompiler buffer in program space

This means we don't need 64-bit moves for every call out of the
recompiler.

* GTE: Don't store as u16 and load as u32

* CPU/Recompiler: Add methods to emit global load/stores

* GTE: Convert class to namespace

* CPU/Recompiler: Call GTE functions directly

* Settings: Turn into a global variable

* GPU: Replace local pointers with global

* InterruptController: Turn into a global pointer

* System: Replace local pointers with global

* Timers: Turn into a global instance

* DMA: Turn into a global instance

* SPU: Turn into a global instance

* CDROM: Turn into a global instance

* MDEC: Turn into a global instance

* Pad: Turn into a global instance

* SIO: Turn into a global instance

* CDROM: Move audio FIFO to the heap

* CPU/Recompiler: Drop ASMFunctions

No longer needed since we have code in the same 4GB window.

* CPUCodeCache: Turn class into namespace

* Bus: Local pointer -> global pointers

* CPU: Turn class into namespace

* Bus: Turn into namespace

* GTE: Store registers in CPU state struct

Allows relative addressing on ARM.

* CPU/Recompiler: Align code storage to page size

* CPU/Recompiler: Fix relative branches on A64

* HostInterface: Local references to global

* System: Turn into a namespace, move events out

* Add guard pages

* Android: Fix build
2020-07-31 17:09:18 +10:00

122 lines
2.2 KiB
C++

#include "sio.h"
#include "common/log.h"
#include "common/state_wrapper.h"
#include "controller.h"
#include "host_interface.h"
#include "interrupt_controller.h"
#include "memory_card.h"
Log_SetChannel(SIO);
SIO g_sio;
SIO::SIO() = default;
SIO::~SIO() = default;
void SIO::Initialize()
{
Reset();
}
void SIO::Shutdown() {}
void SIO::Reset()
{
SoftReset();
}
bool SIO::DoState(StateWrapper& sw)
{
sw.Do(&m_SIO_CTRL.bits);
sw.Do(&m_SIO_STAT.bits);
sw.Do(&m_SIO_MODE.bits);
sw.Do(&m_SIO_BAUD);
return !sw.HasError();
}
u32 SIO::ReadRegister(u32 offset)
{
switch (offset)
{
case 0x00: // SIO_DATA
{
Log_ErrorPrintf("Read SIO_DATA");
const u8 value = 0xFF;
return (ZeroExtend32(value) | (ZeroExtend32(value) << 8) | (ZeroExtend32(value) << 16) |
(ZeroExtend32(value) << 24));
}
case 0x04: // SIO_STAT
{
const u32 bits = m_SIO_STAT.bits;
return bits;
}
case 0x08: // SIO_MODE
return ZeroExtend32(m_SIO_MODE.bits);
case 0x0A: // SIO_CTRL
return ZeroExtend32(m_SIO_CTRL.bits);
case 0x0E: // SIO_BAUD
return ZeroExtend32(m_SIO_BAUD);
default:
Log_ErrorPrintf("Unknown register read: 0x%X", offset);
return UINT32_C(0xFFFFFFFF);
}
}
void SIO::WriteRegister(u32 offset, u32 value)
{
switch (offset)
{
case 0x00: // SIO_DATA
{
Log_WarningPrintf("SIO_DATA (W) <- 0x%02X", value);
return;
}
case 0x0A: // SIO_CTRL
{
Log_DebugPrintf("SIO_CTRL <- 0x%04X", value);
m_SIO_CTRL.bits = Truncate16(value);
if (m_SIO_CTRL.RESET)
SoftReset();
return;
}
case 0x08: // SIO_MODE
{
Log_DebugPrintf("SIO_MODE <- 0x%08X", value);
m_SIO_MODE.bits = Truncate16(value);
return;
}
case 0x0E:
{
Log_DebugPrintf("SIO_BAUD <- 0x%08X", value);
m_SIO_BAUD = Truncate16(value);
return;
}
default:
Log_ErrorPrintf("Unknown register write: 0x%X <- 0x%08X", offset, value);
return;
}
}
void SIO::SoftReset()
{
m_SIO_CTRL.bits = 0;
m_SIO_STAT.bits = 0;
m_SIO_STAT.TXDONE = true;
m_SIO_STAT.TXRDY = true;
m_SIO_MODE.bits = 0;
m_SIO_BAUD = 0xDC;
}