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193 lines
7.7 KiB
C++
193 lines
7.7 KiB
C++
// Copyright 2015, VIXL authors
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// * Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// * Neither the name of ARM Limited nor the names of its contributors may be
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// used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_
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#define VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_
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#include "instructions-aarch64.h"
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namespace vixl {
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namespace aarch64 {
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// Debug instructions.
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//
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// VIXL's macro-assembler and simulator support a few pseudo instructions to
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// make debugging easier. These pseudo instructions do not exist on real
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// hardware.
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//
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// TODO: Also consider allowing these pseudo-instructions to be disabled in the
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// simulator, so that users can check that the input is a valid native code.
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// (This isn't possible in all cases. Printf won't work, for example.)
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//
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// Each debug pseudo instruction is represented by a HLT instruction. The HLT
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// immediate field is used to identify the type of debug pseudo instruction.
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enum DebugHltOpcode {
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kUnreachableOpcode = 0xdeb0,
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kPrintfOpcode,
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kTraceOpcode,
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kLogOpcode,
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kRuntimeCallOpcode,
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kSetCPUFeaturesOpcode,
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kEnableCPUFeaturesOpcode,
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kDisableCPUFeaturesOpcode,
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kSaveCPUFeaturesOpcode,
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kRestoreCPUFeaturesOpcode,
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// Aliases.
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kDebugHltFirstOpcode = kUnreachableOpcode,
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kDebugHltLastOpcode = kLogOpcode
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};
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VIXL_DEPRECATED("DebugHltOpcode", typedef DebugHltOpcode DebugHltOpcodes);
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// Each pseudo instruction uses a custom encoding for additional arguments, as
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// described below.
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// Unreachable - kUnreachableOpcode
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//
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// Instruction which should never be executed. This is used as a guard in parts
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// of the code that should not be reachable, such as in data encoded inline in
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// the instructions.
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// Printf - kPrintfOpcode
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// - arg_count: The number of arguments.
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// - arg_pattern: A set of PrintfArgPattern values, packed into two-bit fields.
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//
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// Simulate a call to printf.
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//
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// Floating-point and integer arguments are passed in separate sets of registers
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// in AAPCS64 (even for varargs functions), so it is not possible to determine
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// the type of each argument without some information about the values that were
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// passed in. This information could be retrieved from the printf format string,
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// but the format string is not trivial to parse so we encode the relevant
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// information with the HLT instruction.
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//
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// Also, the following registers are populated (as if for a native Aarch64
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// call):
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// x0: The format string
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// x1-x7: Optional arguments, if type == CPURegister::kRegister
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// d0-d7: Optional arguments, if type == CPURegister::kFPRegister
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const unsigned kPrintfArgCountOffset = 1 * kInstructionSize;
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const unsigned kPrintfArgPatternListOffset = 2 * kInstructionSize;
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const unsigned kPrintfLength = 3 * kInstructionSize;
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const unsigned kPrintfMaxArgCount = 4;
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// The argument pattern is a set of two-bit-fields, each with one of the
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// following values:
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enum PrintfArgPattern {
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kPrintfArgW = 1,
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kPrintfArgX = 2,
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// There is no kPrintfArgS because floats are always converted to doubles in C
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// varargs calls.
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kPrintfArgD = 3
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};
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static const unsigned kPrintfArgPatternBits = 2;
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// Trace - kTraceOpcode
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// - parameter: TraceParameter stored as a uint32_t
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// - command: TraceCommand stored as a uint32_t
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//
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// Allow for trace management in the generated code. This enables or disables
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// automatic tracing of the specified information for every simulated
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// instruction.
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const unsigned kTraceParamsOffset = 1 * kInstructionSize;
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const unsigned kTraceCommandOffset = 2 * kInstructionSize;
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const unsigned kTraceLength = 3 * kInstructionSize;
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// Trace parameters.
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enum TraceParameters {
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LOG_DISASM = 1 << 0, // Log disassembly.
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LOG_REGS = 1 << 1, // Log general purpose registers.
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LOG_VREGS = 1 << 2, // Log NEON and floating-point registers.
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LOG_SYSREGS = 1 << 3, // Log the flags and system registers.
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LOG_WRITE = 1 << 4, // Log writes to memory.
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LOG_BRANCH = 1 << 5, // Log taken branches.
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LOG_NONE = 0,
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LOG_STATE = LOG_REGS | LOG_VREGS | LOG_SYSREGS,
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LOG_ALL = LOG_DISASM | LOG_STATE | LOG_WRITE | LOG_BRANCH
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};
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// Trace commands.
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enum TraceCommand { TRACE_ENABLE = 1, TRACE_DISABLE = 2 };
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// Log - kLogOpcode
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// - parameter: TraceParameter stored as a uint32_t
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//
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// Print the specified information once. This mechanism is separate from Trace.
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// In particular, _all_ of the specified registers are printed, rather than just
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// the registers that the instruction writes.
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//
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// Any combination of the TraceParameters values can be used, except that
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// LOG_DISASM is not supported for Log.
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const unsigned kLogParamsOffset = 1 * kInstructionSize;
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const unsigned kLogLength = 2 * kInstructionSize;
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// Runtime call simulation - kRuntimeCallOpcode
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enum RuntimeCallType { kCallRuntime, kTailCallRuntime };
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const unsigned kRuntimeCallWrapperOffset = 1 * kInstructionSize;
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// The size of a pointer on host.
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const unsigned kRuntimeCallAddressSize = sizeof(uintptr_t);
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const unsigned kRuntimeCallFunctionOffset =
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kRuntimeCallWrapperOffset + kRuntimeCallAddressSize;
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const unsigned kRuntimeCallTypeOffset =
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kRuntimeCallFunctionOffset + kRuntimeCallAddressSize;
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const unsigned kRuntimeCallLength = kRuntimeCallTypeOffset + sizeof(uint32_t);
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// Enable or disable CPU features - kSetCPUFeaturesOpcode
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// - kEnableCPUFeaturesOpcode
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// - kDisableCPUFeaturesOpcode
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// - parameter[...]: A list of `CPUFeatures::Feature`s, encoded as
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// ConfigureCPUFeaturesElementType and terminated with CPUFeatures::kNone.
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// - [Padding to align to kInstructionSize.]
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//
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// 'Set' completely overwrites the existing CPU features.
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// 'Enable' and 'Disable' update the existing CPU features.
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//
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// These mechanisms allows users to strictly check the use of CPU features in
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// different regions of code.
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//
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// These have no effect on the set of 'seen' features (as reported by
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// CPUFeaturesAuditor::HasSeen(...)).
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typedef uint8_t ConfigureCPUFeaturesElementType;
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const unsigned kConfigureCPUFeaturesListOffset = 1 * kInstructionSize;
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// Save or restore CPU features - kSaveCPUFeaturesOpcode
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// - kRestoreCPUFeaturesOpcode
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//
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// These mechanisms provide a stack-like mechanism for preserving the CPU
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// features, or restoring the last-preserved features. These pseudo-instructions
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// take no arguments.
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//
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// These have no effect on the set of 'seen' features (as reported by
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// CPUFeaturesAuditor::HasSeen(...)).
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} // namespace aarch64
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} // namespace vixl
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#endif // VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_
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