- Added sound ROMs to Daytona 2 (BOTE and PE).

- Implemented bank switching for sample ROMs. It is probably incorrect because there is still 2MB of unaccounted-for space.
- Added a few important TO-DO notes.
This commit is contained in:
Bart Trzynadlowski 2011-07-16 04:53:12 +00:00
parent 325f9ab2e8
commit 004339e601
4 changed files with 115 additions and 23 deletions

View file

@ -40,6 +40,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
FALSE, // 96 MB of banked CROM (Do not Mirror) FALSE, // 96 MB of banked CROM (Do not Mirror)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_FIGHTING, GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_FIGHTING,
{ {
@ -111,6 +112,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 80 MB of banked CROM TRUE, // 80 MB of banked CROM
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE,
{ {
@ -181,6 +183,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 32 MB of banked CROM TRUE, // 32 MB of banked CROM
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE,
{ {
@ -234,6 +237,7 @@ const struct GameInfo Model3GameList[] =
0x200000, // 2 MB of fixed CROM 0x200000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM TRUE, // 64 MB of banked CROM
0x2000000, // 32 MB of VROM 0x2000000, // 32 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1, GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1,
{ {
@ -298,6 +302,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 40 MB of banked CROM TRUE, // 40 MB of banked CROM
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE,
{ {
@ -357,6 +362,7 @@ const struct GameInfo Model3GameList[] =
0x200000, // 2 MB of fixed CROM 0x200000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x2000000, // 32 MB of VROM (will need to be mirrored) 0x2000000, // 32 MB of VROM (will need to be mirrored)
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_JOYSTICK2|GAME_INPUT_FIGHTING, GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_JOYSTICK2|GAME_INPUT_FIGHTING,
{ {
@ -427,6 +433,7 @@ const struct GameInfo Model3GameList[] =
0x200000, // 2 MB of fixed CROM 0x200000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x2000000, // 32 MB of VROM (will need to be mirrored) 0x2000000, // 32 MB of VROM (will need to be mirrored)
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4, // for now, Shift Up/Down mapped to Shift 3/4 GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4, // for now, Shift Up/Down mapped to Shift 3/4
{ {
@ -491,6 +498,7 @@ const struct GameInfo Model3GameList[] =
0x200000, // 2 MB of fixed CROM 0x200000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x2000000, // 32 MB of VROM (will need to be mirrored) 0x2000000, // 32 MB of VROM (will need to be mirrored)
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4,
{ {
@ -555,6 +563,7 @@ const struct GameInfo Model3GameList[] =
0x200000, // 2 MB of fixed CROM 0x200000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x2000000, // 32 MB of VROM (will need to be mirrored) 0x2000000, // 32 MB of VROM (will need to be mirrored)
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4,
{ {
@ -625,6 +634,7 @@ const struct GameInfo Model3GameList[] =
0x200000, // 2 MB of fixed CROM 0x200000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x2000000, // 32 MB of VROM 0x2000000, // 32 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_GUN1|GAME_INPUT_GUN2, GAME_INPUT_COMMON|GAME_INPUT_GUN1|GAME_INPUT_GUN2,
{ {
@ -695,6 +705,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_TWIN_JOYSTICKS, GAME_INPUT_COMMON|GAME_INPUT_TWIN_JOYSTICKS,
{ {
@ -760,6 +771,7 @@ const struct GameInfo Model3GameList[] =
0x400000, // 2 MB of fixed CROM 0x400000, // 2 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x2000000, // 32 MB of VROM 0x2000000, // 32 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_JOYSTICK2|GAME_INPUT_SOCCER, GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_JOYSTICK2|GAME_INPUT_SOCCER,
{ {
@ -830,6 +842,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 64 MB of banked CROM (needs to be mirrored) TRUE, // 64 MB of banked CROM (needs to be mirrored)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_RALLY|GAME_INPUT_SHIFT4, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_RALLY|GAME_INPUT_SHIFT4,
{ {
@ -894,6 +907,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
FALSE, // 96 MB of banked CROM (do not mirror) FALSE, // 96 MB of banked CROM (do not mirror)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x1000000, // 16 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4,
{ {
@ -945,6 +959,13 @@ const struct GameInfo Model3GameList[] =
{ "VROM", "mpr-20884.40", 0x63C4639A, 0x400000, 2, 28, 32, FALSE }, { "VROM", "mpr-20884.40", 0x63C4639A, 0x400000, 2, 28, 32, FALSE },
{ "VROM", "mpr-20885.41", 0x61C292CA, 0x400000, 2, 30, 32, FALSE }, { "VROM", "mpr-20885.41", 0x61C292CA, 0x400000, 2, 30, 32, FALSE },
// Sound ROMs
{ "SndProg","epr-20865.21", 0xB70C2699, 0x20000, 2, 0, 2, TRUE },
{ "Samples","mpr-20866.22", 0x91F40C1C, 0x400000, 2, 0x000000, 2, FALSE },
{ "Samples","mpr-20868.24", 0xFA0C7EC0, 0x400000, 2, 0x400000, 2, FALSE },
{ "Samples","mpr-20867.23", 0xA579C884, 0x400000, 2, 0x800000, 2, FALSE },
{ "Samples","mpr-20869.25", 0x1F338832, 0x400000, 2, 0xC00000, 2, FALSE },
{ NULL, NULL, 0, 0, 0, 0, 0, FALSE } { NULL, NULL, 0, 0, 0, 0, 0, FALSE }
} }
}, },
@ -959,6 +980,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
FALSE, // do not mirror banked CROM FALSE, // do not mirror banked CROM
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x1000000, // 16 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE|GAME_INPUT_VR|GAME_INPUT_SHIFT4,
{ {
@ -1010,6 +1032,13 @@ const struct GameInfo Model3GameList[] =
{ "VROM", "mpr-21212.40", 0x6F8A75E0, 0x400000, 2, 28, 32, FALSE }, { "VROM", "mpr-21212.40", 0x6F8A75E0, 0x400000, 2, 28, 32, FALSE },
{ "VROM", "mpr-21213.41", 0xDE75BEC6, 0x400000, 2, 30, 32, FALSE }, { "VROM", "mpr-21213.41", 0xDE75BEC6, 0x400000, 2, 30, 32, FALSE },
// Sound ROMs
{ "SndProg","epr-21325.21", 0x004AD6AD, 0x20000, 2, 0, 2, TRUE },
{ "Samples","mpr-21285.22", 0x7CDCA6AC, 0x400000, 2, 0x000000, 2, FALSE },
{ "Samples","mpr-21287.24", 0x06B66F17, 0x400000, 2, 0x400000, 2, FALSE },
{ "Samples","mpr-21286.23", 0x749DFEF0, 0x400000, 2, 0x800000, 2, FALSE },
{ "Samples","mpr-21288.25", 0x14BEE38E, 0x400000, 2, 0xC00000, 2, FALSE },
{ NULL, NULL, 0, 0, 0, 0, 0, FALSE } { NULL, NULL, 0, 0, 0, 0, 0, FALSE }
} }
}, },
@ -1022,9 +1051,9 @@ const struct GameInfo Model3GameList[] =
1998, 1998,
0x20, 0x20,
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, TRUE, // 64 MB of banked CROM (must be mirrored)
//0x6000000, // 64 MB of banked CROM
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_JOYSTICK2|GAME_INPUT_FIGHTING, GAME_INPUT_COMMON|GAME_INPUT_JOYSTICK1|GAME_INPUT_JOYSTICK2|GAME_INPUT_FIGHTING,
{ {
@ -1090,6 +1119,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 40 MB of banked CROM TRUE, // 40 MB of banked CROM
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE,
{ {
@ -1149,6 +1179,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 48 MB of banked CROM (mirror) TRUE, // 48 MB of banked CROM (mirror)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_ANALOG_JOYSTICK, GAME_INPUT_COMMON|GAME_INPUT_ANALOG_JOYSTICK,
{ {
@ -1208,6 +1239,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
FALSE, // 96 MB of banked CROM (do not mirror) FALSE, // 96 MB of banked CROM (do not mirror)
0x4000000, // 64 MB of VROM (will need to be mirrored) 0x4000000, // 64 MB of VROM (will need to be mirrored)
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_ANALOG_JOYSTICK, GAME_INPUT_COMMON|GAME_INPUT_ANALOG_JOYSTICK,
{ {
@ -1267,6 +1299,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 48 MB of banked CROM (mirror) TRUE, // 48 MB of banked CROM (mirror)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_ANALOG_JOYSTICK, GAME_INPUT_COMMON|GAME_INPUT_ANALOG_JOYSTICK,
{ {
@ -1331,6 +1364,7 @@ const struct GameInfo Model3GameList[] =
0x800000, // 8 MB of fixed CROM 0x800000, // 8 MB of fixed CROM
TRUE, // 48 MB of banked CROM (mirror) TRUE, // 48 MB of banked CROM (mirror)
0x4000000, // 64 MB of VROM 0x4000000, // 64 MB of VROM
0x800000, // 8 MB of sample ROMs
GAME_INPUT_COMMON|GAME_INPUT_VEHICLE, GAME_INPUT_COMMON|GAME_INPUT_VEHICLE,
{ {
@ -1392,6 +1426,7 @@ const struct GameInfo Model3GameList[] =
0, 0,
0, 0,
0, 0,
0,
{ {
{ NULL, NULL, 0, 0, 0, 0, FALSE }, { NULL, NULL, 0, 0, 0, 0, FALSE },

View file

@ -71,11 +71,12 @@ struct GameInfo
int step; // Model 3 hardware stepping: 0x10 = 1.0, 0x15 = 1.5, 0x20 = 2.0, 0x21 = 2.1 int step; // Model 3 hardware stepping: 0x10 = 1.0, 0x15 = 1.5, 0x20 = 2.0, 0x21 = 2.1
unsigned cromSize; // size of fixed CROM (up to 8 MB) unsigned cromSize; // size of fixed CROM (up to 8 MB)
BOOL mirrorLow64MB; // mirror low 64 MB of banked CROM space to upper 64 MB BOOL mirrorLow64MB; // mirror low 64 MB of banked CROM space to upper 64 MB
unsigned vromSize; // size of video ROMs (32 or 64 MB; if the latter, will have to be mirrored) unsigned vromSize; // size of video ROMs (32 or 64 MB; if 32 MB, will have to be mirrored)
unsigned sampleSize; // size of sample ROMS (8 or 16 MB; if 8 MB, will have to be mirrored)
unsigned inputFlags; // game input types unsigned inputFlags; // game input types
// ROM files // ROM files
struct ROMInfo ROM[40]; struct ROMInfo ROM[42];
}; };

View file

@ -1,4 +1,5 @@
//TODO: Update save state file format (must output) MIDI control port; will no longer be compatible with 0.1a save states //TODO: Update save state file format (must output) MIDI control port; will no longer be compatible with 0.1a save states
//TODO: should sample roms be byteswapped? They currently are. This could also be done in the game list with the byteswap flag...
/** /**
** Supermodel ** Supermodel
** A Sega Model 3 Arcade Emulator. ** A Sega Model 3 Arcade Emulator.
@ -1881,7 +1882,7 @@ void CModel3::RunFrame(void)
ppc_execute(200); ppc_execute(200);
++irqCount; ++irqCount;
if (irqCount > (128*3)) if (irqCount > (128))
{ {
printf("MIDI TIMEOUT!\n"); printf("MIDI TIMEOUT!\n");
break; break;
@ -2157,8 +2158,8 @@ static void Dump(const char *file, UINT8 *buf, unsigned size, BOOL reverse32, BO
#define OFFSET_BACKUPRAM 0xD000000 // 128 KB #define OFFSET_BACKUPRAM 0xD000000 // 128 KB
#define OFFSET_SECURITYRAM 0xD020000 // 128 KB #define OFFSET_SECURITYRAM 0xD020000 // 128 KB
#define OFFSET_SOUNDROM 0xD040000 // 512 KB #define OFFSET_SOUNDROM 0xD040000 // 512 KB
#define OFFSET_SAMPLEROM 0xD0C0000 // 8 MB #define OFFSET_SAMPLEROM 0xD0C0000 // 16 MB
#define MEMORY_POOL_SIZE (0x800000+0x800000+0x8000000+0x4000000+0x20000+0x20000+0x80000+0x800000) #define MEMORY_POOL_SIZE (0x800000+0x800000+0x8000000+0x4000000+0x20000+0x20000+0x80000+0x1000000)
const struct GameInfo * CModel3::GetGameInfo(void) const struct GameInfo * CModel3::GetGameInfo(void)
{ {
@ -2191,13 +2192,15 @@ BOOL CModel3::LoadROMSet(const struct GameInfo *GameList, const char *zipFile)
CopyRegion(crom, 0, 0x800000-Game->cromSize, &crom[0x800000], 0x800000); CopyRegion(crom, 0, 0x800000-Game->cromSize, &crom[0x800000], 0x800000);
if (Game->mirrorLow64MB) // for games w/ 64 MB or less banked CROM, mirror to upper 128 MB if (Game->mirrorLow64MB) // for games w/ 64 MB or less banked CROM, mirror to upper 128 MB
CopyRegion(&crom[0x800000], 0x4000000, 0x8000000, &crom[0x800000], 0x4000000); CopyRegion(&crom[0x800000], 0x4000000, 0x8000000, &crom[0x800000], 0x4000000);
if (Game->sampleSize < 0x1000000) // if less than 16 MB of sample ROMs, mirror
CopyRegion(sampleROM, 0x800000, 0x1000000, sampleROM, 0x800000);
// Byte reverse the PowerPC ROMs (convert to little endian words) // Byte reverse the PowerPC ROMs (convert to little endian words)
Reverse32(crom, 0x800000+0x8000000); Reverse32(crom, 0x800000+0x8000000);
// Byte swap 68K ROMs // Byte swap 68K ROMs
Reverse16(soundROM, 0x80000); Reverse16(soundROM, 0x80000);
Reverse16(sampleROM, 0x800000); // is this correct? Reverse16(sampleROM, 0x1000000); // is this correct?
// Initialize CPU and configure hardware (CPU speed is set in Init()) // Initialize CPU and configure hardware (CPU speed is set in Init())
if (Game->step >= 0x20) // Step 2.0+ if (Game->step >= 0x20) // Step 2.0+

View file

@ -1,3 +1,5 @@
//TODO: clean up M68K interface. pass a bus pointer (SoundBoard should be derived from it), so that M68K handlers have access to CSoundBoard
//TODO: must store actual value of bank register so we can save it to save states
/** /**
** Supermodel ** Supermodel
** A Sega Model 3 Arcade Emulator. ** A Sega Model 3 Arcade Emulator.
@ -25,6 +27,37 @@
* Model 3 sound board. Implementation of the CSoundBoard class. This class can * Model 3 sound board. Implementation of the CSoundBoard class. This class can
* only be instantiated once because it relies on global variables (the non-OOP * only be instantiated once because it relies on global variables (the non-OOP
* 68K core). * 68K core).
*
* TO-DO List
* ----------
* - Optimize memory handlers (jump table).
*
* Bank Switching
* --------------
* Banking is not fully understood yet. It is presumed that the low 2MB of the
* sample ROMs are not banked (MAME), but this is not guaranteed. Below are
* examples of known situations where banking helps (sound names are as they
* appear in the sound test menu).
*
* sound name
* ROM Offsets -> Address
*
* dayto2pe
* --------
* let's hope he does better
* A... -> A... (400001=3E)
* doing good i'd say you have a ..
* E... -> E... (400001=3D)
*
* From the above, it appears that when (400001)&10, then:
*
* ROM A00000-DFFFFF -> A00000-DFFFFF
* ROM E00000-FFFFFF -> E00000-FFFFFF
*
* And when that bit is clear (just use default mapping, upper 6MB of ROM):
*
* ROM 200000-5FFFFF -> A00000-DFFFFF
* ROM 600000-7FFFFF -> E00000-FFFFFF
*/ */
#include "Supermodel.h" #include "Supermodel.h"
@ -39,7 +72,7 @@ static FILE *soundFP;
// Memory regions passed out of CSoundBoard object for global access handlers // Memory regions passed out of CSoundBoard object for global access handlers
static UINT8 *sbRAM1, *sbRAM2; static UINT8 *sbRAM1, *sbRAM2;
static const UINT8 *sbSoundROM, *sbSampleROM; static const UINT8 *sbSoundROM, *sbSampleROM, *sbSampleBankLo, *sbSampleBankHi;
static UINT8 Read8(UINT32 a) static UINT8 Read8(UINT32 a)
{ {
@ -61,11 +94,11 @@ static UINT8 Read8(UINT32 a)
// Sample ROM (bank) // Sample ROM (bank)
else if ((a >= 0xA00000) && (a <= 0xDFFFFF)) else if ((a >= 0xA00000) && (a <= 0xDFFFFF))
return sbSampleROM[(a-0x800000)^1]; return sbSampleBankLo[(a-0xA00000)^1];
// Sample ROM (bank) // Sample ROM (bank)
else if ((a >= 0xE00000) && (a <= 0xFFFFFF)) else if ((a >= 0xE00000) && (a <= 0xFFFFFF))
return sbSampleROM[(a-0x800000)^1]; return sbSampleBankHi[(a-0xE00000)^1];
// SCSP (Master) // SCSP (Master)
else if ((a >= 0x100000) && (a <= 0x10FFFF)) else if ((a >= 0x100000) && (a <= 0x10FFFF))
@ -103,11 +136,11 @@ static UINT16 Read16(UINT32 a)
// Sample ROM (bank) // Sample ROM (bank)
else if ((a >= 0xA00000) && (a <= 0xDFFFFF)) else if ((a >= 0xA00000) && (a <= 0xDFFFFF))
return *(UINT16 *) &sbSampleROM[(a-0x800000)]; return *(UINT16 *) &sbSampleBankLo[(a-0xA00000)];
// Sample ROM (bank) // Sample ROM (bank)
else if ((a >= 0xE00000) && (a <= 0xFFFFFF)) else if ((a >= 0xE00000) && (a <= 0xFFFFFF))
return *(UINT16 *) &sbSampleROM[(a-0x800000)]; return *(UINT16 *) &sbSampleBankHi[(a-0xE00000)];
// SCSP (Master) // SCSP (Master)
else if ((a >= 0x100000) && (a <= 0x10FFFF)) else if ((a >= 0x100000) && (a <= 0x10FFFF))
@ -186,6 +219,21 @@ static void Write8 (unsigned int a,unsigned char d)
else if ((a >= 0x300000) && (a <= 0x30FFFF)) else if ((a >= 0x300000) && (a <= 0x30FFFF))
SCSP_Slave_w8(a,d); SCSP_Slave_w8(a,d);
// Bank register
else if (a == 0x400001)
{
if ((d&0x10))
{
sbSampleBankLo = &sbSampleROM[0xA00000];
sbSampleBankHi = &sbSampleROM[0xE00000];
}
else
{
sbSampleBankLo = &sbSampleROM[0x200000];
sbSampleBankHi = &sbSampleROM[0x600000];
}
}
// Unknown // Unknown
else else
printf("68K: Unknown write8 %06X=%02X\n", a, d); printf("68K: Unknown write8 %06X=%02X\n", a, d);
@ -313,7 +361,10 @@ void CSoundBoard::RunFrame(void)
void CSoundBoard::Reset(void) void CSoundBoard::Reset(void)
{ {
// lets hope he does better... ->
memcpy(ram1, soundROM, 16); // copy 68K vector table memcpy(ram1, soundROM, 16); // copy 68K vector table
sbSampleBankLo = &sampleROM[0x200000]; // default banks
sbSampleBankHi = &sampleROM[0x600000];
M68KReset(); M68KReset();
DebugLog("Sound Board Reset\n"); DebugLog("Sound Board Reset\n");
} }
@ -324,8 +375,8 @@ void CSoundBoard::Reset(void)
******************************************************************************/ ******************************************************************************/
// Offsets of memory regions within sound board's pool // Offsets of memory regions within sound board's pool
#define OFFSETsbRAM1 0 // 1 MB SCSP1 RAM #define OFFSET_RAM1 0 // 1 MB SCSP1 RAM
#define OFFSETsbRAM2 0x100000 // 1 MB SCSP2 RAM #define OFFSET_RAM2 0x100000 // 1 MB SCSP2 RAM
#define MEMORY_POOL_SIZE (0x100000+0x100000) #define MEMORY_POOL_SIZE (0x100000+0x100000)
BOOL CSoundBoard::Init(const UINT8 *soundROMPtr, const UINT8 *sampleROMPtr, CIRQ *ppcIRQObjectPtr, unsigned soundIRQBit) BOOL CSoundBoard::Init(const UINT8 *soundROMPtr, const UINT8 *sampleROMPtr, CIRQ *ppcIRQObjectPtr, unsigned soundIRQBit)
@ -347,14 +398,16 @@ BOOL CSoundBoard::Init(const UINT8 *soundROMPtr, const UINT8 *sampleROMPtr, CIRQ
memset(memoryPool, 0, MEMORY_POOL_SIZE); memset(memoryPool, 0, MEMORY_POOL_SIZE);
// Set up memory pointers // Set up memory pointers
ram1 = &memoryPool[OFFSETsbRAM1]; ram1 = &memoryPool[OFFSET_RAM1];
ram2 = &memoryPool[OFFSETsbRAM2]; ram2 = &memoryPool[OFFSET_RAM2];
// Make global copies of memory pointers for 68K access handlers // Make global copies of memory pointers for 68K access handlers
sbRAM1 = ram1; sbRAM1 = ram1;
sbRAM2 = ram2; sbRAM2 = ram2;
sbSoundROM = soundROM; sbSoundROM = soundROM;
sbSampleROM = sampleROM; sbSampleROM = sampleROM;
sbSampleBankLo = &sampleROM[0x200000];
sbSampleBankHi = &sampleROM[0x600000];
// Initialize 68K core // Initialize 68K core
M68KInit(); M68KInit();