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Added registers to debugger: ctr, xer, srr0, srr1, sdr1, imiss, dmiss, hid0, hid1

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This commit is contained in:
Bart Trzynadlowski 2016-03-21 04:03:44 +00:00
parent 27c20ff5e5
commit 0579e65ebd
2 changed files with 13 additions and 4 deletions
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16
Src/Debugger/CPU/PPCDebug.cpp
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@ -48,6 +48,7 @@ namespace Debugger
{
case PPCSPECIAL_LR: return ::ppc_get_lr();
case PPCSPECIAL_FPSCR: return 0; // TODO
case PPCSPECIAL_MSR: return ::ppc_read_msr();
default: return 0;
}
}
@ -118,11 +119,18 @@ namespace Debugger
AddAddrRegister("lr", srGroup, PPCSPECIAL_LR, GetSpecialReg, SetSpecialReg);
// SPR registers
AddInt32Register ("ctr", srGroup, SPR_LR, GetSPR, SetSPR);
AddInt32Register ("xer", srGroup, SPR_XER, GetSPR, SetSPR);
AddInt32Register ("ctr", srGroup, SPR_LR, GetSPR, SetSPR);
AddInt32Register ("xer", srGroup, SPR_XER, GetSPR, SetSPR);
//AddStatus32Register("xer", srGroup, SPR_XER, "SOC", GetSPR, SetSPR); //TODO: bit mapping is wrong
AddInt32Register ("srr0", srGroup, SPR_SRR0, GetSPR, SetSPR);
AddInt32Register ("srr1", srGroup, SPR_SRR1, GetSPR, SetSPR);
AddInt32Register ("srr0", srGroup, SPR_SRR0, GetSPR, SetSPR);
AddInt32Register ("srr1", srGroup, SPR_SRR1, GetSPR, SetSPR);
AddInt32Register ("msr", srGroup, PPCSPECIAL_MSR, GetSpecialReg, SetSpecialReg);
AddInt32Register ("sdr1", srGroup, SPR603E_SDR1, GetSPR, SetSPR);
AddInt32Register ("imiss",srGroup, SPR603E_IMISS, GetSPR, SetSPR);
AddInt32Register ("dmiss",srGroup, SPR603E_DMISS, GetSPR, SetSPR);
AddInt32Register ("hid0", srGroup, SPR603E_HID0, GetSPR, SetSPR);
AddInt32Register ("hid1", srGroup, SPR603E_HID1, GetSPR, SetSPR);
// etc...
// Condition registers

1
Src/Debugger/CPU/PPCDebug.h
View file

@ -33,6 +33,7 @@
#define PPCSPECIAL_LR 0
#define PPCSPECIAL_FPSCR 1
#define PPCSPECIAL_MSR 2
namespace Debugger
{