mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2025-03-06 14:27:44 +00:00
Fixed compiler warnings
This commit is contained in:
Bart Trzynadlowski
parent
8f87bb1698
commit
27c20ff5e5
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@ -30,6 +30,7 @@
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* not sure whether any other kinds of instructions need checking.
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*/
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#include <cstdint>
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#include <cstdio>
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#include <cstring>
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#ifdef STANDALONE
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@ -37,7 +38,7 @@
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#endif
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#include "Supermodel.h"
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#define DISASM_VERSION "1.0"
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#define DISASM_VERSION "1.1"
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/******************************************************************************
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@ -91,11 +92,11 @@
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* These macros generate instruction words with their associated fields filled
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* in with the passed value.
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*/
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#define D_OP(op) ((op & 0x3f) << 26)
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#define D_XO(xo) ((xo & 0x3ff) << 1)
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#define D_RT(r) ((r & 0x1f) << (31 - 10))
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#define D_RA(r) ((r & 0x1f) << (31 - 15))
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#define D_UIMM(u) (u & 0xffff)
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#define D_OP(op) ((uint32_t(op) & 0x3f) << 26)
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#define D_XO(xo) ((uint32_t(xo) & 0x3ff) << 1)
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#define D_RT(r) ((uint32_t(r) & 0x1f) << (31 - 10))
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#define D_RA(r) ((uint32_t(r) & 0x1f) << (31 - 15))
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#define D_UIMM(u) (uint32_t(u) & 0xffff)
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/*
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* Macros to Get Field Values
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@ -212,12 +213,12 @@ enum
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*/
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typedef struct
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{
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char *mnem; // mnemonic
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UINT32 match; // bit pattern of instruction after it has been masked
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UINT32 mask; // mask of variable fields (AND with ~mask to compare w/
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// bit pattern to determine a match)
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int format; // operand format
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unsigned flags; // flags
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const char *mnem; // mnemonic
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uint32_t match; // bit pattern of instruction after it has been masked
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uint32_t mask; // mask of variable fields (AND with ~mask to compare w/
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// bit pattern to determine a match)
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int format; // operand format
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unsigned flags; // flags
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} IDESCR;
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/*
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@ -435,7 +436,7 @@ static const IDESCR itab[] =
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*
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* Use an index of BI&3 into this table to obtain the CR field bit name.
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*/
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static char *crbit[] = { "lt", "gt", "eq", "so" };
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static const char *crbit[] = { "lt", "gt", "eq", "so" };
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/*
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* SPR():
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@ -445,7 +446,7 @@ static char *crbit[] = { "lt", "gt", "eq", "so" };
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*/
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static void SPR(char *dest, unsigned spr_field)
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{
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unsigned spr;
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unsigned spr;
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/*
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* Construct the SPR number -- SPR field is 2 5-bit fields
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@ -527,13 +528,13 @@ static void SPR(char *dest, unsigned spr_field)
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* Predecodes the SIMM field for us. If do_unsigned, it is printed as an
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* unsigned 32-bit integer.
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*/
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static void DecodeSigned16(char *outbuf, UINT32 op, bool do_unsigned)
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static void DecodeSigned16(char *outbuf, uint32_t op, bool do_unsigned)
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{
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INT16 s;
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s = G_SIMM(op);
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if (do_unsigned) // sign extend to unsigned 32-bits
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sprintf(outbuf, "0x%04X", (UINT32) s);
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sprintf(outbuf, "0x%04X", (uint32_t) s);
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else // print as signed 16 bits
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{
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if (s < 0)
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@ -548,9 +549,9 @@ static void DecodeSigned16(char *outbuf, UINT32 op, bool do_unsigned)
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*
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* Generate a mask from bit MB through ME (PPC-style backwards bit numbering.)
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*/
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static UINT32 Mask(unsigned mb, unsigned me)
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static uint32_t Mask(unsigned mb, unsigned me)
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{
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UINT32 i, mask;
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uint32_t i, mask;
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mb &= 31;
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me &= 31;
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@ -574,11 +575,11 @@ static UINT32 Mask(unsigned mb, unsigned me)
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* Perform checks on the instruction as required by the flags. Returns 1 if
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* the instruction failed.
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*/
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static bool Check(UINT32 op, unsigned flags)
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static bool Check(uint32_t op, unsigned flags)
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{
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unsigned nb, rt, ra;
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unsigned nb, rt, ra;
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if (!flags) return OKAY; // nothing to check for!
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if (!flags) return OKAY; // nothing to check for!
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rt = G_RT(op);
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ra = G_RA(op);
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@ -626,7 +627,7 @@ static bool Check(UINT32 op, unsigned flags)
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return FAIL;
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}
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return OKAY; // passed checks
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return OKAY; // passed checks
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}
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/*
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@ -635,9 +636,9 @@ static bool Check(UINT32 op, unsigned flags)
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* Handles all simplified instruction forms. Returns 1 if one was decoded,
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* otherwise 0 to indicate disassembly should carry on as normal.
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*/
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static bool Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *oprs)
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static bool Simplified(uint32_t op, uint32_t vpc, char *signed16, char *mnem, char *oprs)
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{
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UINT32 value, disp;
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uint32_t value, disp;
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value = G_SIMM(op); // value is fully sign-extended SIMM field
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if (value & 0x8000)
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@ -718,13 +719,13 @@ static bool Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *
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if (G_SH(op) == 0) // rlwinm[.] rA,rT,0,MB,ME -> and[.] rA,rT,MASK
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{
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strcat(mnem, "and");
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if (op & M_RC) strcat(mnem, ".");
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if (op & M_RC) strcat(mnem, ".");
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sprintf(oprs, "r%d,r%d,0x%08X", G_RA(op), G_RT(op), value);
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}
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else // rlwinm[.] rA,rT,SH,MASK
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{
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strcat(mnem, "rlwinm");
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if (op & M_RC) strcat(mnem, ".");
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if (op & M_RC) strcat(mnem, ".");
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sprintf(oprs, "r%d,r%d,%d,0x%08X", G_RA(op), G_RT(op), G_SH(op), value);
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}
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}
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@ -776,11 +777,11 @@ static bool Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *
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strcat(mnem, "subc");
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if (op & M_OE) strcat(mnem, "o");
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if (op & M_RC) strcat(mnem, ".");
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sprintf(oprs, "r%d,r%d,r%d", G_RT(op), G_RB(op), G_RA(op));
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sprintf(oprs, "r%d,r%d,r%d", G_RT(op), G_RB(op), G_RA(op));
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}
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else
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return 0; // no match
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return 1;
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return 1;
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}
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/*
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@ -807,12 +808,11 @@ static bool Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *
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* Zero if successful, non-zero if the instruction was unrecognized or
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* had an invalid form (see note above in function description.)
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*/
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bool DisassemblePowerPC(UINT32 op, UINT32 vpc, char *mnem, char *oprs,
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bool DisassemblePowerPC(uint32_t op, uint32_t vpc, char *mnem, char *oprs,
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bool simplify)
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{
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char signed16[12];
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UINT32 disp;
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int i;
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uint32_t disp;
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mnem[0] = '\0'; // so we can use strcat()
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oprs[0] = '\0';
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@ -837,7 +837,7 @@ bool DisassemblePowerPC(UINT32 op, UINT32 vpc, char *mnem, char *oprs,
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* Search for the instruction in the list and print it if there's a match
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*/
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for (i = 0; i < sizeof(itab) / sizeof(IDESCR); i++)
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for (size_t i = 0; i < sizeof(itab) / sizeof(IDESCR); i++)
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{
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if ((op & ~itab[i].mask) == itab[i].match) // check for match
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{
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@ -974,7 +974,7 @@ bool DisassemblePowerPC(UINT32 op, UINT32 vpc, char *mnem, char *oprs,
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if (G_RA(op))
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sprintf(oprs, "r%d,%s(r%d)", G_RT(op), signed16, G_RA(op));
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else
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sprintf(oprs, "r%d,0x%08X", G_RT(op), (UINT32) ((INT16) G_D(op)));
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sprintf(oprs, "r%d,0x%08X", G_RT(op), (uint32_t) ((INT16) G_D(op)));
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break;
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case F_RT_D_RA:
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@ -985,7 +985,7 @@ bool DisassemblePowerPC(UINT32 op, UINT32 vpc, char *mnem, char *oprs,
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if (G_RA(op))
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sprintf(oprs, "f%d,%s(r%d)", G_RT(op), signed16, G_RA(op));
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else
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sprintf(oprs, "f%d,0x%08X", G_RT(op), (UINT32) ((INT16) G_D(op)));
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sprintf(oprs, "f%d,0x%08X", G_RT(op), (uint32_t) ((INT16) G_D(op)));
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break;
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case F_FRT_D_RA:
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@ -1097,7 +1097,7 @@ bool DisassemblePowerPC(UINT32 op, UINT32 vpc, char *mnem, char *oprs,
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}
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}
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return FAIL; // no match found
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return FAIL; // no match found
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}
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@ -1111,7 +1111,7 @@ bool DisassemblePowerPC(UINT32 op, UINT32 vpc, char *mnem, char *oprs,
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static void PrintUsage(void)
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{
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puts("ppcd Version "DISASM_VERSION" by Bart Trzynadlowski: PowerPC 603e Disassembler");
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puts("ppcd Version " DISASM_VERSION " by Bart Trzynadlowski: PowerPC 603e Disassembler");
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puts("Usage: ppcd <file> [options]");
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puts("Options: -?,-h Show this help text");
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puts(" -s <offset> Start offset (hexadecimal)");
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@ -1131,13 +1131,13 @@ static void PrintUsage(void)
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*/
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int main(int argc, char **argv)
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{
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char mnem[16], oprs[48];
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FILE *fp;
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UINT8 *buffer;
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unsigned i, fsize, start = 0, len, org, file = 0;
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UINT32 op;
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bool len_specified = 0, org_specified = 0, little = 0, simple = 1;
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char *c;
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char mnem[16], oprs[48];
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FILE *fp;
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uint8_t *buffer;
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unsigned i, fsize, start = 0, len, org, file = 0;
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uint32_t op;
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bool len_specified = 0, org_specified = 0, little = 0, simple = 1;
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char *c;
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if (argc <= 1)
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@ -1208,13 +1208,13 @@ int main(int argc, char **argv)
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fsize = ftell(fp);
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rewind(fp);
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if ((buffer = (UINT8 *) calloc(fsize, sizeof(UINT8))) == NULL)
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if ((buffer = (uint8_t *) calloc(fsize, sizeof(uint8_t))) == NULL)
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{
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fprintf(stderr, "ppcd: not enough memory to load input file: %s, %lu bytes\n", argv[file], (unsigned long) fsize);
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fclose(fp);
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exit(1);
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}
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fread(buffer, sizeof(UINT8), fsize, fp);
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fread(buffer, sizeof(uint8_t), fsize, fp);
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fclose(fp);
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if (!len_specified)
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