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When dumping textures, two T1RGB5 texture maps are written: with and without contour processing. Contour processing can be disabled per-polygon and some textures intended to be used without contour processing contain pixels with T=1 that are clearly not supposed to be transparent. We now output textures_t1rgb5_contour.bmp and textures_t1rgb5_opaque.bmp.

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This commit is contained in:
Bart Trzynadlowski 2022-02-05 00:52:34 +00:00
parent 32933ef9b0
commit 3f6937e1a6
2 changed files with 55 additions and 42 deletions
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76
Src/Model3/Real3D.cpp
View file

@ -1,12 +1,12 @@
/** /**
** Supermodel ** Supermodel
** A Sega Model 3 Arcade Emulator. ** A Sega Model 3 Arcade Emulator.
** Copyright 2011 Bart Trzynadlowski, Nik Henson ** Copyright 2011 Bart Trzynadlowski, Nik Henson
** **
** This file is part of Supermodel. ** This file is part of Supermodel.
** **
** Supermodel is free software: you can redistribute it and/or modify it under ** Supermodel is free software: you can redistribute it and/or modify it under
** the terms of the GNU General Public License as published by the Free ** the terms of the GNU General Public License as published by the Free
** Software Foundation, either version 3 of the License, or (at your option) ** Software Foundation, either version 3 of the License, or (at your option)
** any later version. ** any later version.
** **
@ -18,10 +18,10 @@
** You should have received a copy of the GNU General Public License along ** You should have received a copy of the GNU General Public License along
** with Supermodel. If not, see <http://www.gnu.org/licenses/>. ** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
**/ **/
/* /*
* Real3D.cpp * Real3D.cpp
* *
* The Model 3's Real3D-based graphics hardware. Based on the Real3D Pro-1000 * The Model 3's Real3D-based graphics hardware. Based on the Real3D Pro-1000
* family of image generators. * family of image generators.
* *
@ -29,8 +29,8 @@
* ------- * -------
* It appears that Step 2.0 returns a different PCI ID depending on whether * It appears that Step 2.0 returns a different PCI ID depending on whether
* the PCI configuration space or DMA register are accessed. For example, * the PCI configuration space or DMA register are accessed. For example,
* Virtual On 2 expects 0x178611DB from the PCI configuration header but * Virtual On 2 expects 0x178611DB from the PCI configuration header but
* 0x16C311DB from the DMA device. * 0x16C311DB from the DMA device.
* *
* To-Do List * To-Do List
* ---------- * ----------
@ -85,11 +85,11 @@ static void UpdateRenderConfig(IRender3D *Render3D, uint64_t internalRenderConfi
void CReal3D::SaveState(CBlockFile *SaveState) void CReal3D::SaveState(CBlockFile *SaveState)
{ {
SaveState->NewBlock("Real3D", __FILE__); SaveState->NewBlock("Real3D", __FILE__);
SaveState->Write(memoryPool, MEM_POOL_SIZE_RW); // Don't write out read-only snapshots or dirty page arrays SaveState->Write(memoryPool, MEM_POOL_SIZE_RW); // Don't write out read-only snapshots or dirty page arrays
SaveState->Write(&fifoIdx, sizeof(fifoIdx)); SaveState->Write(&fifoIdx, sizeof(fifoIdx));
SaveState->Write(m_vromTextureFIFO, sizeof(m_vromTextureFIFO)); SaveState->Write(m_vromTextureFIFO, sizeof(m_vromTextureFIFO));
SaveState->Write(&dmaSrc, sizeof(dmaSrc)); SaveState->Write(&dmaSrc, sizeof(dmaSrc));
SaveState->Write(&dmaDest, sizeof(dmaDest)); SaveState->Write(&dmaDest, sizeof(dmaDest));
SaveState->Write(&dmaLength, sizeof(dmaLength)); SaveState->Write(&dmaLength, sizeof(dmaLength));
@ -97,7 +97,7 @@ void CReal3D::SaveState(CBlockFile *SaveState)
SaveState->Write(&dmaUnknownReg, sizeof(dmaUnknownReg)); SaveState->Write(&dmaUnknownReg, sizeof(dmaUnknownReg));
SaveState->Write(&dmaStatus, sizeof(dmaStatus)); SaveState->Write(&dmaStatus, sizeof(dmaStatus));
SaveState->Write(&dmaConfig, sizeof(dmaConfig)); SaveState->Write(&dmaConfig, sizeof(dmaConfig));
// These used to be occupied by JTAG state // These used to be occupied by JTAG state
SaveState->Write(m_internalRenderConfig, sizeof(m_internalRenderConfig)); SaveState->Write(m_internalRenderConfig, sizeof(m_internalRenderConfig));
SaveState->Write(commandPortWritten); SaveState->Write(commandPortWritten);
@ -118,7 +118,7 @@ void CReal3D::LoadState(CBlockFile *SaveState)
ErrorLog("Unable to load Real3D GPU state. Save state file is corrupt."); ErrorLog("Unable to load Real3D GPU state. Save state file is corrupt.");
return; return;
} }
SaveState->Read(memoryPool, MEM_POOL_SIZE_RW); SaveState->Read(memoryPool, MEM_POOL_SIZE_RW);
// If multi-threaded, update read-only snapshots too // If multi-threaded, update read-only snapshots too
@ -127,7 +127,7 @@ void CReal3D::LoadState(CBlockFile *SaveState)
Render3D->UploadTextures(0, 0, 0, 2048, 2048); Render3D->UploadTextures(0, 0, 0, 2048, 2048);
SaveState->Read(&fifoIdx, sizeof(fifoIdx)); SaveState->Read(&fifoIdx, sizeof(fifoIdx));
SaveState->Read(&m_vromTextureFIFO, sizeof(m_vromTextureFIFO)); SaveState->Read(&m_vromTextureFIFO, sizeof(m_vromTextureFIFO));
SaveState->Read(&dmaSrc, sizeof(dmaSrc)); SaveState->Read(&dmaSrc, sizeof(dmaSrc));
SaveState->Read(&dmaDest, sizeof(dmaDest)); SaveState->Read(&dmaDest, sizeof(dmaDest));
SaveState->Read(&dmaLength, sizeof(dmaLength)); SaveState->Read(&dmaLength, sizeof(dmaLength));
@ -135,7 +135,7 @@ void CReal3D::LoadState(CBlockFile *SaveState)
SaveState->Read(&dmaUnknownReg, sizeof(dmaUnknownReg)); SaveState->Read(&dmaUnknownReg, sizeof(dmaUnknownReg));
SaveState->Read(&dmaStatus, sizeof(dmaStatus)); SaveState->Read(&dmaStatus, sizeof(dmaStatus));
SaveState->Read(&dmaConfig, sizeof(dmaConfig)); SaveState->Read(&dmaConfig, sizeof(dmaConfig));
SaveState->Read(m_internalRenderConfig, sizeof(m_internalRenderConfig)); SaveState->Read(m_internalRenderConfig, sizeof(m_internalRenderConfig));
UpdateRenderConfig(Render3D, m_internalRenderConfig); UpdateRenderConfig(Render3D, m_internalRenderConfig);
SaveState->Read(&commandPortWritten); SaveState->Read(&commandPortWritten);
@ -224,14 +224,14 @@ uint32_t CReal3D::UpdateSnapshot(bool copyWhole, uint8_t *src, uint8_t *dst, uns
copied += toCopy; copied += toCopy;
} }
d >>= 1; d >>= 1;
pSrc += PAGE_SIZE; pSrc += PAGE_SIZE;
pDst += PAGE_SIZE; pDst += PAGE_SIZE;
} }
dirty[i] = 0; dirty[i] = 0;
} }
else else
{ {
pSrc += 8 * PAGE_SIZE; pSrc += 8 * PAGE_SIZE;
pDst += 8 * PAGE_SIZE; pDst += 8 * PAGE_SIZE;
} }
} }
@ -357,7 +357,7 @@ void CReal3D::StoreTexture(unsigned level, unsigned xPos, unsigned yPos, unsigne
for (uint32_t yy = 0; yy < tileY; yy++) for (uint32_t yy = 0; yy < tileY; yy++)
{ {
for (uint32_t xx = 0; xx < tileX; xx++) for (uint32_t xx = 0; xx < tileX; xx++)
{ {
if (m_gpuMultiThreaded) if (m_gpuMultiThreaded)
MARK_DIRTY(textureRAMDirty, destOffset * 2); MARK_DIRTY(textureRAMDirty, destOffset * 2);
if (tileX == 1) texData -= tileY; if (tileX == 1) texData -= tileY;
@ -518,7 +518,7 @@ void CReal3D::UploadTexture(uint32_t header, const uint16_t *texData)
/****************************************************************************** /******************************************************************************
DMA Device DMA Device
Register 0xC: Register 0xC:
------------- -------------
+---+---+---+---+---+---+---+---+ +---+---+---+---+---+---+---+---+
@ -531,7 +531,7 @@ void CReal3D::UploadTexture(uint32_t header, const uint16_t *texData)
void CReal3D::DMACopy(void) void CReal3D::DMACopy(void)
{ {
DebugLog("Real3D DMA copy (PC=%08X, LR=%08X): %08X -> %08X, %X %s\n", ppc_get_pc(), ppc_get_lr(), dmaSrc, dmaDest, dmaLength*4, (dmaConfig&0x80)?"(byte reversed)":""); DebugLog("Real3D DMA copy (PC=%08X, LR=%08X): %08X -> %08X, %X %s\n", ppc_get_pc(), ppc_get_lr(), dmaSrc, dmaDest, dmaLength*4, (dmaConfig&0x80)?"(byte reversed)":"");
//printf("Real3D DMA copy (PC=%08X, LR=%08X): %08X -> %08X, %X %s\n", ppc_get_pc(), ppc_get_lr(), dmaSrc, dmaDest, dmaLength*4, (dmaConfig&0x80)?"(byte reversed)":""); //printf("Real3D DMA copy (PC=%08X, LR=%08X): %08X -> %08X, %X %s\n", ppc_get_pc(), ppc_get_lr(), dmaSrc, dmaDest, dmaLength*4, (dmaConfig&0x80)?"(byte reversed)":"");
if ((dmaConfig&0x80)) // reverse bytes if ((dmaConfig&0x80)) // reverse bytes
{ {
while (dmaLength != 0) while (dmaLength != 0)
@ -566,7 +566,7 @@ uint8_t CReal3D::ReadDMARegister8(unsigned reg)
default: default:
break; break;
} }
DebugLog("Real3D: ReadDMARegister8: reg=%X\n", reg); DebugLog("Real3D: ReadDMARegister8: reg=%X\n", reg);
return 0; return 0;
} }
@ -601,7 +601,7 @@ uint32_t CReal3D::ReadDMARegister32(unsigned reg)
default: default:
break; break;
} }
DebugLog("Real3D: ReadDMARegister32: reg=%X\n", reg); DebugLog("Real3D: ReadDMARegister32: reg=%X\n", reg);
return 0; return 0;
} }
@ -652,7 +652,7 @@ void CReal3D::WriteDMARegister32(unsigned reg, uint32_t data)
void CReal3D::Flush(void) void CReal3D::Flush(void)
{ {
commandPortWritten = true; commandPortWritten = true;
DebugLog("Real3D 88000000 written @ PC=%08X\n", ppc_get_pc()); DebugLog("Real3D 88000000 written @ PC=%08X\n", ppc_get_pc());
// Upload textures (if any) // Upload textures (if any)
@ -825,13 +825,13 @@ uint32_t CReal3D::ReadRegister(unsigned reg)
uint32_t CReal3D::ReadPCIConfigSpace(unsigned device, unsigned reg, unsigned bits, unsigned offset) uint32_t CReal3D::ReadPCIConfigSpace(unsigned device, unsigned reg, unsigned bits, unsigned offset)
{ {
uint32_t d; uint32_t d;
if ((bits==8)) if ((bits==8))
{ {
DebugLog("Real3D: %d-bit PCI read request for reg=%02X\n", bits, reg); DebugLog("Real3D: %d-bit PCI read request for reg=%02X\n", bits, reg);
return 0; return 0;
} }
// This is a little endian device, must return little endian words // This is a little endian device, must return little endian words
switch (reg) switch (reg)
{ {
@ -859,16 +859,16 @@ uint32_t CReal3D::ReadPCIConfigSpace(unsigned device, unsigned reg, unsigned bit
return 0; return 0;
} }
void CReal3D::WritePCIConfigSpace(unsigned device, unsigned reg, unsigned bits, unsigned offset, uint32_t data) void CReal3D::WritePCIConfigSpace(unsigned device, unsigned reg, unsigned bits, unsigned offset, uint32_t data)
{ {
DebugLog("Real3D: PCI %d-bit write request for reg=%02X, data=%08X\n", bits, reg, data); DebugLog("Real3D: PCI %d-bit write request for reg=%02X, data=%08X\n", bits, reg, data);
} }
void CReal3D::Reset(void) void CReal3D::Reset(void)
{ {
error = false; error = false;
m_pingPong = 0; m_pingPong = 0;
commandPortWritten = false; commandPortWritten = false;
commandPortWrittenRO = false; commandPortWrittenRO = false;
@ -886,7 +886,7 @@ void CReal3D::Reset(void)
dmaUnknownReg = 0; dmaUnknownReg = 0;
dmaStatus = 0; dmaStatus = 0;
dmaConfig = 0; dmaConfig = 0;
unsigned memSize = (m_gpuMultiThreaded ? MEMORY_POOL_SIZE : MEM_POOL_SIZE_RW); unsigned memSize = (m_gpuMultiThreaded ? MEMORY_POOL_SIZE : MEM_POOL_SIZE_RW);
memset(memoryPool, 0, memSize); memset(memoryPool, 0, memSize);
memset(m_vromTextureFIFO, 0, sizeof(m_vromTextureFIFO)); memset(m_vromTextureFIFO, 0, sizeof(m_vromTextureFIFO));
@ -933,11 +933,11 @@ void CReal3D::SetStepping(int stepping, uint32_t pciIDValue)
// Set PCI ID // Set PCI ID
pciID = pciIDValue; pciID = pciIDValue;
// Pass to renderer // Pass to renderer
if (Render3D != NULL) if (Render3D != NULL)
Render3D->SetStepping(step); Render3D->SetStepping(step);
// Set ASIC ID codes // Set ASIC ID codes
m_asicID.clear(); m_asicID.clear();
if (step == 0x10) if (step == 0x10)
@ -983,15 +983,15 @@ bool CReal3D::Init(const uint8_t *vromPtr, IBus *BusObjectPtr, CIRQ *IRQObjectPt
float memSizeMB = (float)memSize/(float)0x100000; float memSizeMB = (float)memSize/(float)0x100000;
// IRQ and bus objects // IRQ and bus objects
Bus = BusObjectPtr; Bus = BusObjectPtr;
IRQ = IRQObjectPtr; IRQ = IRQObjectPtr;
dmaIRQ = dmaIRQBit; dmaIRQ = dmaIRQBit;
// Allocate all Real3D RAM regions // Allocate all Real3D RAM regions
memoryPool = new(std::nothrow) uint8_t[memSize]; memoryPool = new(std::nothrow) uint8_t[memSize];
if (NULL == memoryPool) if (NULL == memoryPool)
return ErrorLog("Insufficient memory for Real3D object (needs %1.1f MB).", memSizeMB); return ErrorLog("Insufficient memory for Real3D object (needs %1.1f MB).", memSizeMB);
// Set up main pointers // Set up main pointers
cullingRAMLo = (uint32_t *) &memoryPool[OFFSET_8C]; cullingRAMLo = (uint32_t *) &memoryPool[OFFSET_8C];
cullingRAMHi = (uint32_t *) &memoryPool[OFFSET_8E]; cullingRAMHi = (uint32_t *) &memoryPool[OFFSET_8E];
@ -1011,10 +1011,10 @@ bool CReal3D::Init(const uint8_t *vromPtr, IBus *BusObjectPtr, CIRQ *IRQObjectPt
polyRAMDirty = (uint8_t *) &memoryPool[OFFSET_98_DIRTY]; polyRAMDirty = (uint8_t *) &memoryPool[OFFSET_98_DIRTY];
textureRAMDirty = (uint8_t *) &memoryPool[OFFSET_TEXRAM_DIRTY]; textureRAMDirty = (uint8_t *) &memoryPool[OFFSET_TEXRAM_DIRTY];
} }
// VROM pointer passed to us // VROM pointer passed to us
vrom = (uint32_t *) vromPtr; vrom = (uint32_t *) vromPtr;
DebugLog("Initialized Real3D (allocated %1.1f MB)\n", memSizeMB); DebugLog("Initialized Real3D (allocated %1.1f MB)\n", memSizeMB);
return OKAY; return OKAY;
} }
@ -1022,7 +1022,7 @@ bool CReal3D::Init(const uint8_t *vromPtr, IBus *BusObjectPtr, CIRQ *IRQObjectPt
CReal3D::CReal3D(const Util::Config::Node &config) CReal3D::CReal3D(const Util::Config::Node &config)
: m_config(config), : m_config(config),
m_gpuMultiThreaded(config["GPUMultiThreaded"].ValueAs<bool>()) m_gpuMultiThreaded(config["GPUMultiThreaded"].ValueAs<bool>())
{ {
Render3D = NULL; Render3D = NULL;
memoryPool = NULL; memoryPool = NULL;
cullingRAMLo = NULL; cullingRAMLo = NULL;
@ -1047,7 +1047,7 @@ CReal3D::CReal3D(const Util::Config::Node &config)
* Destructor. * Destructor.
*/ */
CReal3D::~CReal3D(void) CReal3D::~CReal3D(void)
{ {
// Dump memory // Dump memory
#if 0 #if 0
FILE *fp; FILE *fp;
@ -1092,8 +1092,10 @@ CReal3D::~CReal3D(void)
// Dump textures if requested // Dump textures if requested
if (m_config["DumpTextures"].ValueAsDefault<bool>(false)) if (m_config["DumpTextures"].ValueAsDefault<bool>(false))
{ {
Util::WriteSurfaceToBMP<Util::T1RGB5>("textures_t1rgb5.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false); Util::WriteSurfaceToBMP<Util::T1RGB5ContourEnabled>("textures_t1rgb5_contour.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false);
printf("Wrote textures as T1RGB5 to 'textures_t1rgb5.bmp'\n"); printf("Wrote textures as T1RGB5 (contour bit enabled) to 'textures_t1rgb5_contour.bmp'\n");
Util::WriteSurfaceToBMP<Util::T1RGB5ContourIgnored>("textures_t1rgb5_opaque.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false);
printf("Wrote textures as T1RGB5 (contour bit ignored) to 'textures_t1rgb5_opaque.bmp'\n");
Util::WriteSurfaceToBMP<Util::A4L4Low>("textures_a4l4_lo.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false); Util::WriteSurfaceToBMP<Util::A4L4Low>("textures_a4l4_lo.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false);
printf("Wrote textures as A4L4 (low) to 'textures_a4l4_lo.bmp'\n"); printf("Wrote textures as A4L4 (low) to 'textures_a4l4_lo.bmp'\n");
Util::WriteSurfaceToBMP<Util::L4A4Low>("textures_l4a4_lo.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false); Util::WriteSurfaceToBMP<Util::L4A4Low>("textures_l4a4_lo.bmp", reinterpret_cast<uint8_t*>(textureRAM), 2048, 2048, false);

21
Src/Util/BMPFile.h
View file

@ -28,9 +28,9 @@ namespace Util
{ {
id[0] = 'B'; id[0] = 'B';
id[1] = 'M'; id[1] = 'M';
} }
}; };
// BITMAPV4HEADER // BITMAPV4HEADER
struct BMPInfoHeader struct BMPInfoHeader
{ {
@ -93,7 +93,7 @@ namespace Util
gamma_blue(0) gamma_blue(0)
{} {}
}; };
struct FileHeader struct FileHeader
{ {
BMPHeader bmp_header; BMPHeader bmp_header;
@ -129,6 +129,7 @@ namespace Util
}; };
// Texture format 0: TRRR RRGG GGGB BBBB, T = contour bit // Texture format 0: TRRR RRGG GGGB BBBB, T = contour bit
template <bool EnableContour>
struct T1RGB5 struct T1RGB5
{ {
static const unsigned bytes_per_pixel = 2; static const unsigned bytes_per_pixel = 2;
@ -146,11 +147,21 @@ namespace Util
} }
static inline uint8_t GetAlpha(const uint8_t *pixel) static inline uint8_t GetAlpha(const uint8_t *pixel)
{ {
bool t = (*reinterpret_cast<const uint16_t*>(pixel) >> 15) & 0x1; if (EnableContour)
return t ? uint8_t(0x00) : uint8_t(0xff); // T-bit indicates transparency {
bool t = (*reinterpret_cast<const uint16_t*>(pixel) >> 15) & 0x1;
return t ? uint8_t(0x00) : uint8_t(0xff); // T-bit indicates transparency
}
else
{
return 0xff; // force opaque
}
} }
}; };
using T1RGB5ContourEnabled = struct T1RGB5<true>;
using T1RGB5ContourIgnored = struct T1RGB5<false>;
// Texture format 1: xxxx xxxx AAAA LLLL // Texture format 1: xxxx xxxx AAAA LLLL
struct A4L4Low struct A4L4Low
{ {