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Merge branch 'master' of https://github.com/trzy/Supermodel

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This commit is contained in:
Ian Curtis 2023-09-23 15:27:12 +01:00
parent c6ea81d996 38a95088e8
commit 6b0d5c453a
6 changed files with 104 additions and 98 deletions
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18
Config/Games.xml
View file

@ -1443,6 +1443,10 @@
</inputs> </inputs>
</hardware> </hardware>
<roms> <roms>
<patches>
<!-- Prevent "rolling start" scrolling glitch -->
<patch region="crom" bits="32" offset="0x14BDB8" value="0x20B201E0" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true"> <region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19691.20" crc32="0x83523B89" /> <file offset="0" name="epr-19691.20" crc32="0x83523B89" />
<file offset="2" name="epr-19690.19" crc32="0x25F007FE" /> <file offset="2" name="epr-19690.19" crc32="0x25F007FE" />
@ -1531,6 +1535,8 @@
<patches> <patches>
<!-- Secret debug menu --> <!-- Secret debug menu -->
<patch region="crom" bits="32" offset="0x199DE8" value="0x00050208" /> <patch region="crom" bits="32" offset="0x199DE8" value="0x00050208" />
<!-- Prevent "rolling start" scrolling glitch -->
<patch region="crom" bits="32" offset="0x14BDF4" value="0x20B201E0" />
</patches> </patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true"> <region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19734.20" crc32="0xBE897336" /> <file offset="0" name="epr-19734.20" crc32="0xBE897336" />
@ -1563,6 +1569,10 @@
</inputs> </inputs>
</hardware> </hardware>
<roms> <roms>
<patches>
<!-- Prevent "rolling start" scrolling glitch -->
<patch region="crom" bits="32" offset="0x146350" value="0x20B201E0" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true"> <region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19607a.20" crc32="0x24301A12" /> <file offset="0" name="epr-19607a.20" crc32="0x24301A12" />
<file offset="2" name="epr-19608a.19" crc32="0x1426160E" /> <file offset="2" name="epr-19608a.19" crc32="0x1426160E" />
@ -1636,6 +1646,10 @@
</inputs> </inputs>
</hardware> </hardware>
<roms> <roms>
<patches>
<!-- Prevent "rolling start" scrolling glitch -->
<patch region="crom" bits="32" offset="0x14E3F0" value="0x20B201E0" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true"> <region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-20095a.20" crc32="0x58C7E393" /> <file offset="0" name="epr-20095a.20" crc32="0x58C7E393" />
<file offset="2" name="epr-20094a.19" crc32="0xDBF17A43" /> <file offset="2" name="epr-20094a.19" crc32="0xDBF17A43" />
@ -1684,6 +1698,10 @@
</inputs> </inputs>
</hardware> </hardware>
<roms> <roms>
<patches>
<!-- Prevent "rolling start" scrolling glitch -->
<patch region="crom" bits="32" offset="0x14E014" value="0x20B201E0" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true"> <region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-20095.20" crc32="0x44467BC1" /> <file offset="0" name="epr-20095.20" crc32="0x44467BC1" />
<file offset="2" name="epr-20094.19" crc32="0x299B6257" /> <file offset="2" name="epr-20094.19" crc32="0x299B6257" />

16
Src/Debugger/CPU/Z80Debug.cpp
View file

@ -33,7 +33,7 @@
namespace Debugger namespace Debugger
{ {
// Instruction templates // Instruction templates
static char *templates[5][256] = { static const char *templates[5][256] = {
{ {
// Table 0: single byte instructions // Table 0: single byte instructions
"NOP","LD BC,@a","LD (BC),A","INC BC","INC B","DEC B","LD B,@d","RLCA", "NOP","LD BC,@a","LD (BC),A","INC BC","INC B","DEC B","LD B,@d","RLCA",
@ -393,10 +393,10 @@ namespace Debugger
switch (opcode) switch (opcode)
{ {
case 0xCB: case 0xCB:
templ = templates[1][m_bus->Read8(dAddr++)]; templ = (char*)templates[1][m_bus->Read8(dAddr++)];
break; break;
case 0xED: case 0xED:
templ = templates[2][m_bus->Read8(dAddr++)]; templ = (char*)templates[2][m_bus->Read8(dAddr++)];
break; break;
case 0xDD: case 0xDD:
xyChr = 'X'; xyChr = 'X';
@ -405,10 +405,10 @@ namespace Debugger
{ {
offs = m_bus->Read8(dAddr++); offs = m_bus->Read8(dAddr++);
notJump = true; notJump = true;
templ = templates[4][m_bus->Read8(dAddr++)]; templ = (char*)templates[4][m_bus->Read8(dAddr++)];
} }
else else
templ = templates[3][nextCode]; templ = (char*)templates[3][nextCode];
break; break;
case 0xFD: case 0xFD:
xyChr = 'Y'; xyChr = 'Y';
@ -417,13 +417,13 @@ namespace Debugger
{ {
offs = m_bus->Read8(dAddr++); offs = m_bus->Read8(dAddr++);
notJump = true; notJump = true;
templ = templates[4][m_bus->Read8(dAddr++)]; templ = (char*)templates[4][m_bus->Read8(dAddr++)];
} }
else else
templ = templates[3][nextCode]; templ = (char*)templates[3][nextCode];
break; break;
default: default:
templ = templates[0][opcode]; templ = (char*)templates[0][opcode];
break; break;
} }

7
Src/Model3/Model3.cpp
View file

@ -2949,12 +2949,7 @@ bool CModel3::LoadGame(const Game &game, const ROMSet &rom_set)
// Initialize Real3D // Initialize Real3D
int stepping = ((game.stepping[0] - '0') << 4) | (game.stepping[2] - '0'); int stepping = ((game.stepping[0] - '0') << 4) | (game.stepping[2] - '0');
uint32_t real3DPCIID = game.real3d_pci_id; GPU.SetStepping(stepping);
if (0 == real3DPCIID)
{
real3DPCIID = stepping >= 0x20 ? CReal3D::PCIID::Step2x : CReal3D::PCIID::Step1x;
}
GPU.SetStepping(stepping, real3DPCIID);
// MPEG board (if present) // MPEG board (if present)
if (rom_set.get_rom("mpeg_program").size) if (rom_set.get_rom("mpeg_program").size)

15
Src/Model3/Real3D.cpp
View file

@ -27,10 +27,10 @@
* *
* PCI IDs * PCI IDs
* ------- * -------
* It appears that Step 2.0 returns a different PCI ID depending on whether * It appears that accessing the PCI configuration space returns the PCI ID
* the PCI configuration space or DMA register are accessed. For example, * of Mercury (0x16C311DB) on Step 1.x and the DMA device (0x178611DB) on
* Virtual On 2 expects 0x178611DB from the PCI configuration header but * Step 2.x, while accessing the Step 2.x DMA device register returns the
* 0x16C311DB from the DMA device. * PCI ID of Mercury. Step 2.x games by AM3 expect this behavior.
* *
* To-Do List * To-Do List
* ---------- * ----------
@ -628,7 +628,8 @@ void CReal3D::WriteDMARegister32(unsigned reg, uint32_t data)
case 0x10: // command register case 0x10: // command register
if ((data&0x20000000)) // DMA ID command if ((data&0x20000000)) // DMA ID command
{ {
dmaData = pciID; // Games requesting PCI ID via the DMA device expect 0x16C311DB, even on step 2.x boards
dmaData = PCIID::Step1x;
DebugLog("Real3D: DMA ID command issued (ATTENTION: make sure we're returning the correct value), PC=%08X, LR=%08X\n", ppc_get_pc(), ppc_get_lr()); DebugLog("Real3D: DMA ID command issued (ATTENTION: make sure we're returning the correct value), PC=%08X, LR=%08X\n", ppc_get_pc(), ppc_get_lr());
} }
else if ((data&0x80000000)) else if ((data&0x80000000))
@ -921,7 +922,7 @@ uint32_t CReal3D::GetASICIDCode(ASIC asic) const
return it == m_asicID.end() ? 0 : it->second; return it == m_asicID.end() ? 0 : it->second;
} }
void CReal3D::SetStepping(int stepping, uint32_t pciIDValue) void CReal3D::SetStepping(int stepping)
{ {
step = stepping; step = stepping;
if ((step!=0x10) && (step!=0x15) && (step!=0x20) && (step!=0x21)) if ((step!=0x10) && (step!=0x15) && (step!=0x20) && (step!=0x21))
@ -931,7 +932,7 @@ void CReal3D::SetStepping(int stepping, uint32_t pciIDValue)
} }
// Set PCI ID // Set PCI ID
pciID = pciIDValue; pciID = stepping >= 0x20 ? PCIID::Step2x : PCIID::Step1x;
// Pass to renderer // Pass to renderer
if (Render3D != NULL) if (Render3D != NULL)

18
Src/Model3/Real3D.h
View file

@ -68,10 +68,11 @@ public:
/* /*
* PCI IDs * PCI IDs
* *
* The CReal3D object must be configured with the desired ID. Some Step 2.x * The CReal3D object must be configured with the PCI ID of the ASIC directly
* appear to defy this and expect the 1.x ID. The symptom of this is that * connected to the PCI slot; 0x16c311db for Step 1.x, 0x178611db for Step
* VBL is enabled briefly then disabled. This should be investigated further. * 2.x. Requesting PCI ID via the DMA device on Step 2.x appears to return
* Perhaps a different ASIC's PCI ID is being read in these situations? * the PCI ID of Mercury which is the ASIC connected to the PCI slot on Step
* 1.x, hence why some Step 2.x games appear to expect the 1.x ID.
* *
* The vendor ID code 0x11db is Sega's. * The vendor ID code 0x11db is Sega's.
*/ */
@ -374,7 +375,7 @@ public:
uint32_t GetASICIDCode(ASIC asic) const; uint32_t GetASICIDCode(ASIC asic) const;
/* /*
* SetStepping(stepping, pciIDValue): * SetStepping(stepping):
* *
* Sets the Model 3 hardware stepping, which also determines the Real3D * Sets the Model 3 hardware stepping, which also determines the Real3D
* functionality. The default is Step 1.0. This should be called prior to * functionality. The default is Step 1.0. This should be called prior to
@ -383,13 +384,8 @@ public:
* Parameters: * Parameters:
* stepping 0x10 for Step 1.0, 0x15 for Step 1.5, 0x20 for Step 2.0, or * stepping 0x10 for Step 1.0, 0x15 for Step 1.5, 0x20 for Step 2.0, or
* 0x21 for Step 2.1. Anything else defaults to 1.0. * 0x21 for Step 2.1. Anything else defaults to 1.0.
* pciIDValue The PCI ID code to return. This should be one of the PCIID
* enum values otherwise games may fail to boot. Although the
* PCI ID depends on stepping, there are a few games that
* have to be explicitly configured with an older ID code,
* which is why this parameter is exposed.
*/ */
void SetStepping(int stepping, uint32_t pciIDValue); void SetStepping(int stepping);
/* /*

6
Src/Sound/SCSP.cpp
View file

@ -88,8 +88,6 @@ bool legacySound; // For LegacySound (SCSP DSP) config option.
//#define CORRECT_FOR_18BIT_DAC //#define CORRECT_FOR_18BIT_DAC
// These globals control the operation of the SCSP, they are no longer extern and are set through SCSP_SetBuffers(). --Bart // These globals control the operation of the SCSP, they are no longer extern and are set through SCSP_SetBuffers(). --Bart
static double SoundClock; // Originally titled SysFPS; seems to be for the sound CPU.
static const double Freq = 76;
static float* bufferfl; static float* bufferfl;
static float* bufferfr; static float* bufferfr;
static float* bufferrl; static float* bufferrl;
@ -606,7 +604,6 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
s_config = &config; s_config = &config;
s_multiThreaded = config["MultiThreaded"].ValueAs<bool>(); s_multiThreaded = config["MultiThreaded"].ValueAs<bool>();
legacySound = config["LegacySoundDSP"].ValueAs<bool>(); legacySound = config["LegacySoundDSP"].ValueAs<bool>();
SoundClock = Freq;
if(n==2) if(n==2)
{ {
@ -1516,7 +1513,7 @@ void SCSP_CpuRunScanline()
void SCSP_DoMasterSamples(int nsamples) void SCSP_DoMasterSamples(int nsamples)
{ {
int slice = (int)(12000000. / (SoundClock*nsamples)); // 68K cycles/sample const int slice = 11289600 / 44100; // 68K clocked at 11.2896MHz (45.1584MHz OSC / 4), which is 256 cycles/sample
static int lastdiff = 0; static int lastdiff = 0;
/* /*
@ -2130,7 +2127,6 @@ void SCSP_LoadState(CBlockFile *StateFile)
void SCSP_SetBuffers(float *leftBufferPtr, float *rightBufferPtr, float* leftRearBufferPtr, float* rightRearBufferPtr, int bufferLength) void SCSP_SetBuffers(float *leftBufferPtr, float *rightBufferPtr, float* leftRearBufferPtr, float* rightRearBufferPtr, int bufferLength)
{ {
SoundClock = Freq;
bufferfl = leftBufferPtr; bufferfl = leftBufferPtr;
bufferfr = rightBufferPtr; bufferfr = rightBufferPtr;
bufferrl = leftRearBufferPtr; bufferrl = leftRearBufferPtr;