mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2024-11-22 05:45:38 +00:00
Merge branch 'master' of https://github.com/trzy/Supermodel
This commit is contained in:
Ian Curtis
commit
6b0d5c453a
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@ -1443,6 +1443,10 @@
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</inputs>
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</hardware>
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<roms>
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<patches>
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<!-- Prevent "rolling start" scrolling glitch -->
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<patch region="crom" bits="32" offset="0x14BDB8" value="0x20B201E0" />
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</patches>
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<region name="crom" stride="8" chunk_size="2" byte_swap="true">
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<file offset="0" name="epr-19691.20" crc32="0x83523B89" />
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<file offset="2" name="epr-19690.19" crc32="0x25F007FE" />
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@ -1531,6 +1535,8 @@
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<patches>
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<!-- Secret debug menu -->
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<patch region="crom" bits="32" offset="0x199DE8" value="0x00050208" />
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<!-- Prevent "rolling start" scrolling glitch -->
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<patch region="crom" bits="32" offset="0x14BDF4" value="0x20B201E0" />
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</patches>
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<region name="crom" stride="8" chunk_size="2" byte_swap="true">
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<file offset="0" name="epr-19734.20" crc32="0xBE897336" />
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@ -1563,6 +1569,10 @@
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</inputs>
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</hardware>
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<roms>
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<patches>
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<!-- Prevent "rolling start" scrolling glitch -->
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<patch region="crom" bits="32" offset="0x146350" value="0x20B201E0" />
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</patches>
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<region name="crom" stride="8" chunk_size="2" byte_swap="true">
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<file offset="0" name="epr-19607a.20" crc32="0x24301A12" />
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<file offset="2" name="epr-19608a.19" crc32="0x1426160E" />
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@ -1636,6 +1646,10 @@
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</inputs>
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</hardware>
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<roms>
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<patches>
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<!-- Prevent "rolling start" scrolling glitch -->
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<patch region="crom" bits="32" offset="0x14E3F0" value="0x20B201E0" />
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</patches>
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<region name="crom" stride="8" chunk_size="2" byte_swap="true">
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<file offset="0" name="epr-20095a.20" crc32="0x58C7E393" />
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<file offset="2" name="epr-20094a.19" crc32="0xDBF17A43" />
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@ -1684,6 +1698,10 @@
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</inputs>
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</hardware>
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<roms>
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<patches>
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<!-- Prevent "rolling start" scrolling glitch -->
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<patch region="crom" bits="32" offset="0x14E014" value="0x20B201E0" />
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</patches>
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<region name="crom" stride="8" chunk_size="2" byte_swap="true">
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<file offset="0" name="epr-20095.20" crc32="0x44467BC1" />
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<file offset="2" name="epr-20094.19" crc32="0x299B6257" />
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@ -33,7 +33,7 @@
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namespace Debugger
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{
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// Instruction templates
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static char *templates[5][256] = {
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static const char *templates[5][256] = {
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{
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// Table 0: single byte instructions
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"NOP","LD BC,@a","LD (BC),A","INC BC","INC B","DEC B","LD B,@d","RLCA",
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@ -393,10 +393,10 @@ namespace Debugger
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switch (opcode)
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{
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case 0xCB:
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templ = templates[1][m_bus->Read8(dAddr++)];
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templ = (char*)templates[1][m_bus->Read8(dAddr++)];
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break;
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case 0xED:
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templ = templates[2][m_bus->Read8(dAddr++)];
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templ = (char*)templates[2][m_bus->Read8(dAddr++)];
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break;
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case 0xDD:
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xyChr = 'X';
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@ -405,10 +405,10 @@ namespace Debugger
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{
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offs = m_bus->Read8(dAddr++);
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notJump = true;
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templ = templates[4][m_bus->Read8(dAddr++)];
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templ = (char*)templates[4][m_bus->Read8(dAddr++)];
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}
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else
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templ = templates[3][nextCode];
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templ = (char*)templates[3][nextCode];
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break;
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case 0xFD:
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xyChr = 'Y';
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@ -417,13 +417,13 @@ namespace Debugger
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{
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offs = m_bus->Read8(dAddr++);
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notJump = true;
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templ = templates[4][m_bus->Read8(dAddr++)];
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templ = (char*)templates[4][m_bus->Read8(dAddr++)];
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}
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else
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templ = templates[3][nextCode];
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templ = (char*)templates[3][nextCode];
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break;
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default:
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templ = templates[0][opcode];
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templ = (char*)templates[0][opcode];
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break;
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}
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@ -2949,12 +2949,7 @@ bool CModel3::LoadGame(const Game &game, const ROMSet &rom_set)
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// Initialize Real3D
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int stepping = ((game.stepping[0] - '0') << 4) | (game.stepping[2] - '0');
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uint32_t real3DPCIID = game.real3d_pci_id;
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if (0 == real3DPCIID)
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{
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real3DPCIID = stepping >= 0x20 ? CReal3D::PCIID::Step2x : CReal3D::PCIID::Step1x;
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}
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GPU.SetStepping(stepping, real3DPCIID);
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GPU.SetStepping(stepping);
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// MPEG board (if present)
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if (rom_set.get_rom("mpeg_program").size)
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@ -27,10 +27,10 @@
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*
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* PCI IDs
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* -------
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* It appears that Step 2.0 returns a different PCI ID depending on whether
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* the PCI configuration space or DMA register are accessed. For example,
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* Virtual On 2 expects 0x178611DB from the PCI configuration header but
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* 0x16C311DB from the DMA device.
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* It appears that accessing the PCI configuration space returns the PCI ID
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* of Mercury (0x16C311DB) on Step 1.x and the DMA device (0x178611DB) on
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* Step 2.x, while accessing the Step 2.x DMA device register returns the
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* PCI ID of Mercury. Step 2.x games by AM3 expect this behavior.
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*
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* To-Do List
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* ----------
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@ -628,7 +628,8 @@ void CReal3D::WriteDMARegister32(unsigned reg, uint32_t data)
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case 0x10: // command register
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if ((data&0x20000000)) // DMA ID command
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{
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dmaData = pciID;
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// Games requesting PCI ID via the DMA device expect 0x16C311DB, even on step 2.x boards
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dmaData = PCIID::Step1x;
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DebugLog("Real3D: DMA ID command issued (ATTENTION: make sure we're returning the correct value), PC=%08X, LR=%08X\n", ppc_get_pc(), ppc_get_lr());
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}
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else if ((data&0x80000000))
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@ -921,7 +922,7 @@ uint32_t CReal3D::GetASICIDCode(ASIC asic) const
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return it == m_asicID.end() ? 0 : it->second;
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}
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void CReal3D::SetStepping(int stepping, uint32_t pciIDValue)
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void CReal3D::SetStepping(int stepping)
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{
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step = stepping;
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if ((step!=0x10) && (step!=0x15) && (step!=0x20) && (step!=0x21))
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@ -931,7 +932,7 @@ void CReal3D::SetStepping(int stepping, uint32_t pciIDValue)
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}
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// Set PCI ID
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pciID = pciIDValue;
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pciID = stepping >= 0x20 ? PCIID::Step2x : PCIID::Step1x;
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// Pass to renderer
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if (Render3D != NULL)
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@ -68,10 +68,11 @@ public:
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/*
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* PCI IDs
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*
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* The CReal3D object must be configured with the desired ID. Some Step 2.x
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* appear to defy this and expect the 1.x ID. The symptom of this is that
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* VBL is enabled briefly then disabled. This should be investigated further.
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* Perhaps a different ASIC's PCI ID is being read in these situations?
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* The CReal3D object must be configured with the PCI ID of the ASIC directly
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* connected to the PCI slot; 0x16c311db for Step 1.x, 0x178611db for Step
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* 2.x. Requesting PCI ID via the DMA device on Step 2.x appears to return
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* the PCI ID of Mercury which is the ASIC connected to the PCI slot on Step
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* 1.x, hence why some Step 2.x games appear to expect the 1.x ID.
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*
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* The vendor ID code 0x11db is Sega's.
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*/
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@ -374,7 +375,7 @@ public:
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uint32_t GetASICIDCode(ASIC asic) const;
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/*
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* SetStepping(stepping, pciIDValue):
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* SetStepping(stepping):
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*
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* Sets the Model 3 hardware stepping, which also determines the Real3D
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* functionality. The default is Step 1.0. This should be called prior to
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@ -383,13 +384,8 @@ public:
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* Parameters:
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* stepping 0x10 for Step 1.0, 0x15 for Step 1.5, 0x20 for Step 2.0, or
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* 0x21 for Step 2.1. Anything else defaults to 1.0.
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* pciIDValue The PCI ID code to return. This should be one of the PCIID
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* enum values otherwise games may fail to boot. Although the
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* PCI ID depends on stepping, there are a few games that
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* have to be explicitly configured with an older ID code,
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* which is why this parameter is exposed.
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*/
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void SetStepping(int stepping, uint32_t pciIDValue);
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void SetStepping(int stepping);
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/*
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@ -88,8 +88,6 @@ bool legacySound; // For LegacySound (SCSP DSP) config option.
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//#define CORRECT_FOR_18BIT_DAC
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// These globals control the operation of the SCSP, they are no longer extern and are set through SCSP_SetBuffers(). --Bart
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static double SoundClock; // Originally titled SysFPS; seems to be for the sound CPU.
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static const double Freq = 76;
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static float* bufferfl;
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static float* bufferfr;
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static float* bufferrl;
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@ -606,7 +604,6 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
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s_config = &config;
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s_multiThreaded = config["MultiThreaded"].ValueAs<bool>();
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legacySound = config["LegacySoundDSP"].ValueAs<bool>();
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SoundClock = Freq;
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if(n==2)
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{
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@ -1516,7 +1513,7 @@ void SCSP_CpuRunScanline()
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void SCSP_DoMasterSamples(int nsamples)
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{
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int slice = (int)(12000000. / (SoundClock*nsamples)); // 68K cycles/sample
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const int slice = 11289600 / 44100; // 68K clocked at 11.2896MHz (45.1584MHz OSC / 4), which is 256 cycles/sample
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static int lastdiff = 0;
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/*
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@ -2130,7 +2127,6 @@ void SCSP_LoadState(CBlockFile *StateFile)
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void SCSP_SetBuffers(float *leftBufferPtr, float *rightBufferPtr, float* leftRearBufferPtr, float* rightRearBufferPtr, int bufferLength)
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{
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SoundClock = Freq;
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bufferfl = leftBufferPtr;
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bufferfr = rightBufferPtr;
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bufferrl = leftRearBufferPtr;
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