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Fixed display of PowerPC condition code bits in debugger (were backwards) and changed XER to print as hex.

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This commit is contained in:
Bart Trzynadlowski 2015-12-07 05:56:36 +00:00
parent 3d00225cba
commit 8e6712d2c7
1 changed files with 3 additions and 2 deletions
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5
Src/Debugger/CPU/PPCDebug.cpp
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@ -119,7 +119,8 @@ namespace Debugger
// SPR registers // SPR registers
AddInt32Register ("ctr", srGroup, SPR_LR, GetSPR, SetSPR); AddInt32Register ("ctr", srGroup, SPR_LR, GetSPR, SetSPR);
AddStatus32Register("xer", srGroup, SPR_XER, "SOC", GetSPR, SetSPR); AddInt32Register ("xer", srGroup, SPR_XER, GetSPR, SetSPR);
//AddStatus32Register("xer", srGroup, SPR_XER, "SOC", GetSPR, SetSPR); //TODO: bit mapping is wrong
AddInt32Register ("srr0", srGroup, SPR_SRR0, GetSPR, SetSPR); AddInt32Register ("srr0", srGroup, SPR_SRR0, GetSPR, SetSPR);
AddInt32Register ("srr1", srGroup, SPR_SRR1, GetSPR, SetSPR); AddInt32Register ("srr1", srGroup, SPR_SRR1, GetSPR, SetSPR);
// etc... // etc...
@ -128,7 +129,7 @@ namespace Debugger
for (unsigned id = 0; id < 8; id++) for (unsigned id = 0; id < 8; id++)
{ {
sprintf(m_crNames[id], "cr%u", id); sprintf(m_crNames[id], "cr%u", id);
AddStatus8Register(m_crNames[id], crGroup, id, "O=><", GetCR, SetCR); AddStatus8Register(m_crNames[id], crGroup, id, "<>=O", GetCR, SetCR);
} }
//AddStatus16Register("fpscr", "Condition Registers", PPCSPECIAL_FPSCR, "FEVOUZX789ABCRI 0123", GetSpecial, SetSpecial); //AddStatus16Register("fpscr", "Condition Registers", PPCSPECIAL_FPSCR, "FEVOUZX789ABCRI 0123", GetSpecial, SetSpecial);