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Use correct PCI IDs (Harry Tuttle)

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This commit is contained in:
Ian Curtis 2018-07-09 08:06:06 +00:00
parent 80cf1f9b52
commit 9f5a19a04a
5 changed files with 594 additions and 618 deletions
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63
Config/Games.xml
View file

@ -457,7 +457,7 @@
</hardware>
<roms>
<patches>
<!-- Skips over cabinet network error (not required, but speeds up boot) -->
<!-- Skips over cabinet network error -->
<patch region="crom" bits="32" offset="0x4a45e4" value="0x60000000" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
@ -574,7 +574,7 @@
</hardware>
<roms>
<patches>
<!-- Skips over cabinet network error (not required, but speeds up boot) -->
<!-- Skips over cabinet network error -->
<patch region="crom" bits="32" offset="0x4a45e4" value="0x60000000" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
@ -850,11 +850,7 @@
</inputs>
</hardware>
<roms>
<patches>
<!-- Base offset of program in CROM space: 0x6473c0 (0x473c0 in the ROM) -->
<patch region="crom" bits="32" offset="0x0D8C4C" value="0x00000002" /> <!-- comm. mode: 00=master, 01=slave, 02=satellite -->
<patch region="crom" bits="32" offset="0x13FE38" value="0x38840004" /> <!-- an actual bug in the game code -->
</patches>
<!-- Base offset of program in CROM space: 0x6473c0 (0x0473c0 in the ROM) -->
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19890b.20" crc32="0x9C16C3CC" />
<file offset="2" name="epr-19889b.19" crc32="0xD1F7E44C" />
@ -1128,6 +1124,10 @@
</inputs>
</hardware>
<roms>
<patches>
<!-- Secret debug menu -->
<patch region="crom" bits="32" offset="0x199DE8" value="0x00050208" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19734.20" crc32="0xBE897336" />
<file offset="2" name="epr-19733.19" crc32="0x6565E29A" />
@ -1639,6 +1639,7 @@
</hardware>
<roms>
<patches>
<!-- Unemulated JTAG stuff -->
<patch region="crom" bits="32" offset="0x7c0c4" value="0x60000000" />
<patch region="crom" bits="32" offset="0x7c0c8" value="0x60000000" />
<patch region="crom" bits="32" offset="0x7c0cc" value="0x60000000" />
@ -1810,14 +1811,8 @@
</hardware>
<roms>
<patches>
<patch region="crom" bits="32" offset="0xf0e48" value="0x60000000" />
<patch region="crom" bits="32" offset="0x043dc" value="0x48000090" /> <!-- related to joystick feedback -->
<patch region="crom" bits="32" offset="0x029a0" value="0x60000000" /> <!-- skip force feedback setup? -->
<patch region="crom" bits="32" offset="0x02a0c" value="0x60000000" />
<!-- Additional patches from MAME for test menu -->
<patch region="crom" bits="32" offset="0xf776c" value="0x60000000" /> <!-- unemulated JTAG stuff -->
<patch region="crom" bits="32" offset="0xf7770" value="0x60000000" /> <!-- "" -->
<patch region="crom" bits="32" offset="0xf7774" value="0x60000000" /> <!-- "" -->
<!-- skip force feedback lever check -->
<patch region="crom" bits="32" offset="0xf6e44" value="0x60000000" /> <!-- from MAME -->
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-21382a.20" crc32="0x69BAF117" />
@ -1876,7 +1871,8 @@
<file offset="0x800000" name="mpr-21377.22" crc32="0x720621F8" />
<file offset="0xC00000" name="mpr-21378.24" crc32="0x1FCF715E" />
</region>
<!-- Force feedback controller prg
<!-- Force feedback controller prg -->
<!--
<region name="ffb_program" stride="1" chunk_size="1">
<file offset="0" name="epr-21119.ic8" crc32="0x65082B14" />
</region>
@ -1902,6 +1898,7 @@
</hardware>
<roms>
<patches>
<!-- skip force feedback lever check -->
<patch region="crom" bits="32" offset="0xf6dd0" value="0x60000000" /> <!-- from MAME -->
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
@ -2293,16 +2290,6 @@
</inputs>
</hardware>
<roms>
<patches>
<!--
VS215 is a modification of VS2 that runs on Step 1.5 boards. I
suspect the code here is trying to detect the system type.
The patch branches to 0xFFF01630:
0x48000000 + (0xFFF01630 - 0xFFF001A8) = 0x48001488
-->
<patch region="crom" bits="32" offset="0x1001a8" value="0x48001488" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19897.20" crc32="0x25A722A9" />
<file offset="2" name="epr-19898.19" crc32="0x4389D9CE" />
@ -2330,10 +2317,6 @@
</inputs>
</hardware>
<roms>
<patches>
<!-- See note in VS215 -->
<patch region="crom" bits="32" offset="0x1001a8" value="0x48001488" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-19803.20" crc32="0x1E55A5B8" />
<file offset="2" name="epr-19804.19" crc32="0xBBACA578" />
@ -2362,18 +2345,6 @@
<encryption_key>0x29234e96</encryption_key>
</hardware>
<roms>
<patches>
<!--
Offset of program relative to CROM base: 0x600000 (0x200000 in the
ROM itself). Inexplicably, at PC=AFC1C, a call is made to FC78, which
is right in the middle of some totally unrelated initialization code
(ASIC checks). This causes an invalid pointer to be fetched. Perhaps
FC78 should be overwritten with other program data by then? Why is it
not? Or, 300138 needs to be written with a non-zero value, it is
loaded from EEPROM but is 0.
-->
<patch region="crom" bits="32" offset="0x2afc1c" value="0x60000000" /> <!-- 0x6afc1c from base of CROM -->
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-20920.20" crc32="0x428D05FC" />
<file offset="2" name="epr-20919.19" crc32="0x7A0713D2" />
@ -2448,10 +2419,6 @@
</inputs>
</hardware>
<roms>
<patches>
<!-- See note in VS215 -->
<patch region="crom" bits="32" offset="0x1001a8" value="0x48001488" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-20912.20" crc32="0xCD2C0538" />
<file offset="2" name="epr-20911.19" crc32="0xACB8FD97" />
@ -2581,10 +2548,6 @@
</inputs>
</hardware>
<roms>
<patches>
<!-- See note in VS215 -->
<patch region="crom" bits="32" offset="0x1001a8" value="0x48001488" />
</patches>
<region name="crom" stride="8" chunk_size="2" byte_swap="true">
<file offset="0" name="epr-21534.20" crc32="0xD49AE219" />
<file offset="2" name="epr-21533.19" crc32="0xEA728471" />

29
Src/Graphics/New3D/New3D.cpp
View file

@ -23,15 +23,12 @@ CNew3D::CNew3D(const Util::Config::Node &config, std::string gameName)
m_cullingRAMHi = nullptr;
m_polyRAM = nullptr;
m_vrom = nullptr;
m_textureRAM = nullptr;
m_sunClamp = true;
m_shadeIsSigned = true;
// Fall-back mechanism for games with patched (not working) JTAG
if (m_gameName == "swtrilgy") m_shadeIsSigned = false;
}
CNew3D::~CNew3D()
m_textureRAM = nullptr;
m_sunClamp = true;
m_shadeIsSigned = true;
}
CNew3D::~CNew3D()
{
m_vbo.Destroy();
}
@ -1662,12 +1659,10 @@ void CNew3D::SetSunClamp(bool enable)
{
m_sunClamp = enable;
}
void CNew3D::SetSignedShade(bool enable)
{
if (m_gameName == "swtrilgy") return; // jtag has been patched out in star wars - todo fix this
m_shadeIsSigned = enable;
}
void CNew3D::SetSignedShade(bool enable)
{
m_shadeIsSigned = enable;
}
} // New3D

995
Src/Model3/Model3.cpp
View file

File diff suppressed because it is too large Load diff

110
Src/Model3/Real3D.cpp
View file

@ -263,12 +263,12 @@ void CReal3D::BeginFrame(void)
// If multi-threaded, perform now any queued texture uploads to renderer before rendering begins
if (m_gpuMultiThreaded)
{
for (const auto &it : queuedUploadTexturesRO) {
for (const auto &it : queuedUploadTexturesRO) {
Render3D->UploadTextures(it.level, it.x, it.y, it.width, it.height);
}
}
// done syncing data
queuedUploadTexturesRO.clear();
// done syncing data
queuedUploadTexturesRO.clear();
}
Render3D->BeginFrame();
@ -628,15 +628,15 @@ void CReal3D::WriteDMARegister32(unsigned reg, uint32_t data)
dmaLength = data;
DMACopy();
dmaStatus |= 1;
IRQ->Assert(dmaIRQ);
break;
case 0x10: // command register
if ((data&0x20000000))
{
dmaData = 0x16C311DB; // Virtual On 2 expects this from DMA
DebugLog("Real3D: DMA ID command issued (ATTENTION: make sure we're returning the correct value), PC=%08X, LR=%08X\n", ppc_get_pc(), ppc_get_lr());
}
else if ((data&0x80000000))
IRQ->Assert(dmaIRQ);
break;
case 0x10: // command register
if ((data&0x20000000)) // DMA ID command
{
dmaData = pciID;
DebugLog("Real3D: DMA ID command issued (ATTENTION: make sure we're returning the correct value), PC=%08X, LR=%08X\n", ppc_get_pc(), ppc_get_lr());
}
else if ((data&0x80000000))
{
dmaData = ReadRegister(data & 0x3F);
}
@ -656,35 +656,36 @@ void CReal3D::WriteDMARegister32(unsigned reg, uint32_t data)
******************************************************************************/
void CReal3D::Flush(void)
{
commandPortWritten = true;
DebugLog("Real3D 88000000 written @ PC=%08X\n", ppc_get_pc());
// Upload textures (if any)
if (fifoIdx > 0)
{
{
commandPortWritten = true;
DebugLog("Real3D 88000000 written @ PC=%08X\n", ppc_get_pc());
// Upload textures (if any)
if (fifoIdx > 0)
{
for (uint32_t i = 0; i < fifoIdx; )
{
uint32_t size = 2+textureFIFO[i+0]/2;
size /= 4;
uint32_t header = textureFIFO[i+1]; // texture information header
// Spikeout seems to be uploading 0 length textures
if (0 == size)
{
uint32_t size = 2+textureFIFO[i+0]/2;
size /= 4;
uint32_t header = textureFIFO[i+1]; // texture information header
// Spikeout seems to be uploading 0 length textures
if (0 == size)
{
DebugLog("Real3D: 0-length texture upload @ PC=%08X (%08X %08X %08X)\n", ppc_get_pc(), textureFIFO[i+0], textureFIFO[i+1], textureFIFO[i+2]);
break;
}
UploadTexture(header,(uint16_t *)&textureFIFO[i+2]);
DebugLog("Real3D: Texture upload completed: %X bytes (%X)\n", size*4, textureFIFO[i+0]);
i += size;
}
}
// Reset texture FIFO
fifoIdx = 0;
}
UploadTexture(header,(uint16_t *)&textureFIFO[i+2]);
DebugLog("Real3D: Texture upload completed: %X bytes (%X)\n", size*4, textureFIFO[i+0]);
i += size;
}
}
// Reset texture FIFO
fifoIdx = 0;
}
void CReal3D::WriteTextureFIFO(uint32_t data)
{
@ -865,23 +866,26 @@ void CReal3D::AttachRenderer(IRender3D *Render3DPtr)
uint32_t CReal3D::GetASICIDCode(ASIC asic) const
{
auto it = m_asicID.find(asic);
return it == m_asicID.end() ? 0 : it->second;
}
void CReal3D::SetStepping(int stepping)
{
step = stepping;
if ((step!=0x10) && (step!=0x15) && (step!=0x20) && (step!=0x21))
return it == m_asicID.end() ? 0 : it->second;
}
void CReal3D::SetStepping(int stepping, bool step20_with_old_real3d)
{
step = stepping;
if ((step!=0x10) && (step!=0x15) && (step!=0x20) && (step!=0x21))
{
DebugLog("Real3D: Unrecognized stepping: %d.%d\n", (step>>4)&0xF, step&0xF);
step = 0x10;
}
// Set PCI ID
if (step < 0x20)
pciID = 0x16C311DB; // vendor 0x11DB = Sega
else
pciID = 0x178611DB;
DebugLog("Real3D: Unrecognized stepping: %d.%d\n", (step>>4)&0xF, step&0xF);
step = 0x10;
}
// Set PCI ID
// Some step 2+ games need the older PCI ID (obvious symptom:
// vbl is enabled briefly then disabled so the game hangs)
if ((step < 0x20) || step20_with_old_real3d)
pciID = 0x16C311DB; // vendor 0x11DB = Sega
else
pciID = 0x178611DB;
// Pass to renderer
if (Render3D != NULL)

15
Src/Model3/Real3D.h
View file

@ -359,13 +359,14 @@ public:
* any other emulation functions and after Init().
*
* Parameters:
* stepping 0x10 for Step 1.0, 0x15 for Step 1.5, 0x20 for Step 2.0, or
* 0x21 for Step 2.1. Anything else defaults to 1.0.
*/
void SetStepping(int stepping);
/*
* Init(vromPtr, BusObjectPtr, IRQObjectPtr, dmaIRQBit):
* stepping 0x10 for Step 1.0, 0x15 for Step 1.5, 0x20 for Step 2.0, or
* 0x21 for Step 2.1. Anything else defaults to 1.0.
*/
void SetStepping(int stepping, bool step20_with_old_real3d);
/*
* Init(vromPtr, BusObjectPtr, IRQObjectPtr, dmaIRQBit):
*
* One-time initialization of the context. Must be called prior to all
* other members. Connects the Real3D device to its video ROM and allocates